Change pic_set_irq to pic_set_irq_new. Index: qemu/hw/slavio_misc.c =================================================================== --- qemu.orig/hw/slavio_misc.c 2006-09-03 10:29:53.000000000 +0000 +++ qemu/hw/slavio_misc.c 2006-09-03 10:31:19.000000000 +0000 @@ -36,6 +36,9 @@ #ifdef DEBUG_MISC #define MISC_DPRINTF(fmt, args...) \ do { printf("MISC: " fmt , ##args); } while (0) +#define pic_set_irq_new(intctl, irq, level) \ + do { printf("MISC: set_irq(%d): %d\n", (irq), (level)); \ + pic_set_irq_new((intctl), (irq),(level));} while (0) #else #define MISC_DPRINTF(fmt, args...) #endif @@ -45,6 +48,7 @@ uint8_t config; uint8_t aux1, aux2; uint8_t diag, mctrl, sysctrl; + void *intctl; } MiscState; #define MISC_MAXADDR 1 @@ -54,9 +58,9 @@ MiscState *s = opaque; if ((s->aux2 & 0x4) && (s->config & 0x8)) { - pic_set_irq(s->irq, 1); + pic_set_irq_new(s->intctl, s->irq, 1); } else { - pic_set_irq(s->irq, 0); + pic_set_irq_new(s->intctl, s->irq, 0); } } @@ -210,7 +214,7 @@ return 0; } -void *slavio_misc_init(uint32_t base, int irq) +void *slavio_misc_init(uint32_t base, int irq, void *intctl) { int slavio_misc_io_memory; MiscState *s; @@ -236,6 +240,7 @@ cpu_register_physical_memory(base + 0xa000000, MISC_MAXADDR, slavio_misc_io_memory); s->irq = irq; + s->intctl = intctl; register_savevm("slavio_misc", base, 1, slavio_misc_save, slavio_misc_load, s); qemu_register_reset(slavio_misc_reset, s); Index: qemu/vl.h =================================================================== --- qemu.orig/vl.h 2006-09-03 10:29:53.000000000 +0000 +++ qemu/vl.h 2006-09-03 10:31:19.000000000 +0000 @@ -1028,7 +1028,6 @@ /* sun4m.c */ extern QEMUMachine sun4m_machine; -void pic_set_irq_cpu(int irq, int level, unsigned int cpu); /* iommu.c */ void *iommu_init(uint32_t addr); @@ -1053,11 +1052,11 @@ unsigned long vram_offset, int vram_size, int width, int height); /* slavio_intctl.c */ +void pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); void *slavio_intctl_init(); void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env); void slavio_pic_info(void *opaque); void slavio_irq_info(void *opaque); -void slavio_pic_set_irq(void *opaque, int irq, int level); void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); /* loader.c */ @@ -1067,14 +1066,16 @@ int load_aout(const char *filename, uint8_t *addr); /* slavio_timer.c */ -void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu); +void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu, + void *intctl); /* slavio_serial.c */ -SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); -void slavio_serial_ms_kbd_init(int base, int irq); +SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, + CharDriverState *chr2, void *intctl); +void slavio_serial_ms_kbd_init(int base, int irq, void *intctl); /* slavio_misc.c */ -void *slavio_misc_init(uint32_t base, int irq); +void *slavio_misc_init(uint32_t base, int irq, void *intctl); void slavio_set_power_fail(void *opaque, int power_failing); /* esp.c */ Index: qemu/hw/slavio_timer.c =================================================================== --- qemu.orig/hw/slavio_timer.c 2006-09-03 10:29:53.000000000 +0000 +++ qemu/hw/slavio_timer.c 2006-09-03 10:31:19.000000000 +0000 @@ -28,6 +28,9 @@ #ifdef DEBUG_TIMER #define DPRINTF(fmt, args...) \ do { printf("TIMER: " fmt , ##args); } while (0) +#define pic_set_irq_new(intctl, irq, level) \ + do { printf("TIMER: set_irq(%d): %d\n", (irq), (level)); \ + pic_set_irq_new((intctl), (irq),(level));} while (0) #else #define DPRINTF(fmt, args...) #endif @@ -57,6 +60,7 @@ int reached, stopped; int mode; // 0 = processor, 1 = user, 2 = system unsigned int cpu; + void *intctl; } SLAVIO_TIMERState; #define TIMER_MAXADDR 0x1f @@ -103,7 +107,7 @@ DPRINTF("irq %d limit %d reached %d d %" PRId64 " count %d s->c %x diff %" PRId64 " stopped %d mode %d\n", s->irq, limit, s->reached?1:0, (ticks-s->count_load_time), count, s->count, s->expire_time - ticks, s->stopped, s->mode); if (s->mode != 1) - pic_set_irq_cpu(s->irq, out, s->cpu); + pic_set_irq_cpu(s->intctl, s->irq, out, s->cpu); } // timer callback @@ -130,7 +134,7 @@ // part of counter (user mode) if (s->mode != 1) { // clear irq - pic_set_irq_cpu(s->irq, 0, s->cpu); + pic_set_irq_cpu(s->intctl, s->irq, 0, s->cpu); s->count_load_time = qemu_get_clock(vm_clock); s->reached = 0; return s->limit; @@ -266,7 +270,8 @@ slavio_timer_get_out(s); } -void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu) +void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu, + void *intctl) { int slavio_timer_io_memory; SLAVIO_TIMERState *s; @@ -278,6 +283,7 @@ s->mode = mode; s->cpu = cpu; s->irq_timer = qemu_new_timer(vm_clock, slavio_timer_irq, s); + s->intctl = intctl; slavio_timer_io_memory = cpu_register_io_memory(0, slavio_timer_mem_read, slavio_timer_mem_write, s); Index: qemu/hw/sun4m.c =================================================================== --- qemu.orig/hw/sun4m.c 2006-09-03 10:29:53.000000000 +0000 +++ qemu/hw/sun4m.c 2006-09-03 10:46:45.000000000 +0000 @@ -178,17 +178,7 @@ void pic_set_irq(int irq, int level) { - slavio_pic_set_irq(slavio_intctl, irq, level); -} - -void pic_set_irq_new(void *opaque, int irq, int level) -{ - pic_set_irq(irq, level); -} - -void pic_set_irq_cpu(int irq, int level, unsigned int cpu) -{ - slavio_pic_set_irq_cpu(slavio_intctl, irq, level, cpu); + pic_set_irq_new(slavio_intctl, irq, level); } static void *slavio_misc; @@ -250,16 +240,21 @@ } nvram = m48t59_init(0, PHYS_JJ_EEPROM, 0, PHYS_JJ_EEPROM_SIZE, 8); for (i = 0; i < MAX_CPUS; i++) { - slavio_timer_init(PHYS_JJ_CLOCK + i * TARGET_PAGE_SIZE, PHYS_JJ_CLOCK_IRQ, 0, i); + slavio_timer_init(PHYS_JJ_CLOCK + i * TARGET_PAGE_SIZE, + PHYS_JJ_CLOCK_IRQ, 0, i, slavio_intctl); } - slavio_timer_init(PHYS_JJ_CLOCK1, PHYS_JJ_CLOCK1_IRQ, 2, (unsigned int)-1); - slavio_serial_ms_kbd_init(PHYS_JJ_MS_KBD, PHYS_JJ_MS_KBD_IRQ); + slavio_timer_init(PHYS_JJ_CLOCK1, PHYS_JJ_CLOCK1_IRQ, 2, (unsigned int)-1, + slavio_intctl); + slavio_serial_ms_kbd_init(PHYS_JJ_MS_KBD, PHYS_JJ_MS_KBD_IRQ, + slavio_intctl); // Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device // Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device - slavio_serial_init(PHYS_JJ_SER, PHYS_JJ_SER_IRQ, serial_hds[1], serial_hds[0]); + slavio_serial_init(PHYS_JJ_SER, PHYS_JJ_SER_IRQ, serial_hds[1], + serial_hds[0], slavio_intctl); fdctrl_init(PHYS_JJ_FLOPPY_IRQ, 0, 1, PHYS_JJ_FDC, fd_table); main_esp = esp_init(bs_table, PHYS_JJ_ESP, dma); - slavio_misc = slavio_misc_init(PHYS_JJ_SLAVIO, PHYS_JJ_ME_IRQ); + slavio_misc = slavio_misc_init(PHYS_JJ_SLAVIO, PHYS_JJ_ME_IRQ, + slavio_intctl); sparc32_dma_set_reset_data(dma, main_esp, main_lance); prom_offset = ram_size + vram_size; Index: qemu/hw/slavio_intctl.c =================================================================== --- qemu.orig/hw/slavio_intctl.c 2006-09-03 10:29:53.000000000 +0000 +++ qemu/hw/slavio_intctl.c 2006-09-03 10:31:19.000000000 +0000 @@ -281,7 +281,7 @@ * "irq" here is the bit number in the system interrupt register to * separate serial and keyboard interrupts sharing a level. */ -void slavio_pic_set_irq(void *opaque, int irq, int level) +static void slavio_pic_set_irq(void *opaque, int irq, int level) { SLAVIO_INTCTLState *s = opaque; @@ -303,7 +303,12 @@ slavio_check_interrupts(s); } -void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu) +void pic_set_irq_new(void *opaque, int irq, int level) +{ + slavio_pic_set_irq(opaque, irq, level); +} + +void pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu) { SLAVIO_INTCTLState *s = opaque; Index: qemu/hw/slavio_serial.c =================================================================== --- qemu.orig/hw/slavio_serial.c 2006-09-03 10:29:53.000000000 +0000 +++ qemu/hw/slavio_serial.c 2006-09-03 10:31:19.000000000 +0000 @@ -52,8 +52,9 @@ #ifdef DEBUG_SERIAL #define SER_DPRINTF(fmt, args...) \ do { printf("SER: " fmt , ##args); } while (0) -#define pic_set_irq(irq, level) \ -do { printf("SER: set_irq(%d): %d\n", (irq), (level)); pic_set_irq((irq),(level));} while (0) +#define pic_set_irq_new(intctl, irq, level) \ + do { printf("SER: set_irq(%d): %d\n", (irq), (level)); \ + pic_set_irq_new((intctl), (irq),(level));} while (0) #else #define SER_DPRINTF(fmt, args...) #endif @@ -95,6 +96,7 @@ uint8_t rx, tx, wregs[16], rregs[16]; SERIOQueue queue; CharDriverState *chr; + void *intctl; } ChannelState; struct SerialState { @@ -161,7 +163,7 @@ irq = slavio_serial_update_irq_chn(s); irq |= slavio_serial_update_irq_chn(s->otherchn); - pic_set_irq(s->irq, irq); + pic_set_irq_new(s->intctl, s->irq, irq); } static void slavio_serial_reset_chn(ChannelState *s) @@ -452,7 +454,8 @@ } -SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2) +SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, + CharDriverState *chr2, void *intctl) { int slavio_serial_io_memory, i; SerialState *s; @@ -471,6 +474,7 @@ s->chn[i].irq = irq; s->chn[i].chn = 1 - i; s->chn[i].type = ser; + s->chn[i].intctl = intctl; if (s->chn[i].chr) { qemu_chr_add_read_handler(s->chn[i].chr, serial_can_receive, serial_receive1, &s->chn[i]); qemu_chr_add_event_handler(s->chn[i].chr, serial_event); @@ -568,7 +572,7 @@ put_queue(s, 0); } -void slavio_serial_ms_kbd_init(int base, int irq) +void slavio_serial_ms_kbd_init(int base, int irq, void *intctl) { int slavio_serial_io_memory, i; SerialState *s; @@ -580,6 +584,7 @@ s->chn[i].irq = irq; s->chn[i].chn = 1 - i; s->chn[i].chr = NULL; + s->chn[i].intctl = intctl; } s->chn[0].otherchn = &s->chn[1]; s->chn[1].otherchn = &s->chn[0];