qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Fwd: [Qemu-devel] Interrupt request info


From: Alessandro Corradi
Subject: Fwd: [Qemu-devel] Interrupt request info
Date: Wed, 1 Nov 2006 10:19:14 +0100



---------- Forwarded message ----------
From: Alessandro Corradi <address@hidden>
Date: 31-ott-2006 10.25
Subject: Re: [Qemu-devel] Interrupt request info
To: Rob Landley <address@hidden>

I already read this, but give no usefull information... and I searched everywhere in the web...
For example, I wrote a module of a simple memory without implementing IRQ... I think it is  an error but it works fine... are IRQ raise in any case???
I look at other code source of implemented hw but for each device there is a differeny way to raise an interrupt (i see).
Is there a standard way to do this?
The following is an excerpt of my simple memory, please can you describe me fastly how can I manage this?

Thank you


struct scmemState {
    uint32_t data;
    uint32_t addr;
    uint32_t control;
    uint32_t comm;

    int irq;
    int irq_pending;
};

scmemState *scmem_init(int base, int irq){
    scmemState *s;

    s=qemu_mallocz(sizeof(scmemState));
    s->irq = irq;
    s->data = "">    s->addr = 0;
    s->control = 0;
    ...
}
static void scmem_ioport_write(void *opaque, uint32_t addr, uint32_t val) {
    scmemState *s = opaque;
    addr &= 7;
    switch(addr) {
    case 0:
        cosim(1,DATA,val);
        s->data = "">        #ifdef SCDEBUG
        printf("Writing at 0x738 (data reg) value= %d\n",val);
        #endif
        break;
    case 1:
        cosim(1,ADDR,val);
        s->addr = val;
        #ifdef SCDEBUG   
        printf("Writing at 0x739 (addr reg) value= %d\n",val);
        #endif
        break;
    case 2:
        cosim(1,CONTROL,val);
        s->control = val;
        #ifdef SCDEBUG   
        printf("Writing at 0x74a (control reg) value= %d\n",val);
        #endif
        break;
    case 3:
        if (val == 0x0003) { //SC socket connection restore
            scmem_restore();
        } else {
            cosim(1,COMM,val);
            s->comm = val;
            #ifdef SCDEBUG   
            printf("Writing at 0x74b (comm reg) value= %d\n",val);
            #endif
        }
        break;
    }
}


2006/10/28, Rob Landley < address@hidden >:
On Saturday 28 October 2006 5:36 am, Alessandro Corradi wrote:
> Hello,
> Can someone give me detailed information (or a link where it is described)
> how qemu manage hw interrupts?
> I can't find any usefull info about it in QEMU doc.

http://www.qemu.org/qemu-tech.html#SEC18

> ps: Obviously, if these information are already present I apologize me in
> advance, I try to search but nothing was found  :)

The documentation is a bit sparse in places.

Rob
--
"Perfection is reached, not when there is no longer anything to add, but
when there is no longer anything to take away." - Antoine de Saint-Exupery


reply via email to

[Prev in Thread] Current Thread [Next in Thread]