Re: [Qemu-devel] Potential sparc32 MMU bug

[Peter]

Where is the policy of silently ignoring ROM writes implemented?  It
may not be the proper behavior for sparc, and I'd like to tinker with
it.  I'm just not sure where the write is getting suppressed (or,
alternatively, where the exception is getting suppressed).

On 2/16/07, Paul Brook <address@hidden> wrote:
> > > I don't know about sparc, but it's normal for writes to ROM to be
> > > ignored. However by my reading the sparc bios is loaded into RAM anyway,
> > > so it shouldn't matter.
> >
> > It definitely gets blocked by something: if I leave the the trap table
> > in the .text section, the write silently fails.  If I move the trap
> > table to the .data section, the write succeeds.  If I move the trap
> > table over to .rodata, the write fails again.  What are you looking at
> > that suggests the whole sparc bios is loaded read/write?
>
> I was mistaken. There is a ROM area defined, it's just the elf loader doesn't
> care whether it's loading to rom or ram.
>
> My comment about rom writes being silently ignored still applies.
>
> Paul