Re: [Qemu-devel] [PATCH] pcnet32 driver change, please test

[Stuart Brady]

On Fri, Mar 02, 2007 at 08:09:49PM +0000, Thiemo Seufer wrote:
> Hello All,
> 
> I changed the pcnet32 driver to get rid of bitfields in its
> implementation, now it works also on big endian host systems.

I find this curious...  C99 (6.7.2.1) says "the allocation order of
bit-fields within a unit (high-order to low-order or low-order to
high-order) is implementation defined".  I can't see any requirement
for this, so is it just convention that bitfields on big endian systems
start from the most significant bit, and those on little endian systems
start from the least significant bit?  (My thinking is that endianness
usually refers to byte ordering and not so much bit ordering.)

I ask this because I'd seen some code of the form:

#ifdef WORDS_BIGENDIAN
typedef struct { int b7:1; int b6:1; int b5:1; int b4:1;
                 int b3:1; int b2:1; int b1:1; int b0:1; } foo;
#else
typedef struct { int b0:1; int b1:1; int b2:1; int b3:1;
                 int b4:1; int b5:1; int b6:1; int b7:1; } foo;
#endif

and I had assumed that this was sheer nonsense...

> I tested only the 32 bit mode which is used by MIPS/Malta, and
> I'm not sure if it still works in Lance mode (as e.g. used on SPARC).
> So please test if it still works.

I've tried this patch with a SPARC target running Etch, with an i386 host.
No problems so far.

(FWIW, I have noticed one bug, but it's *not* a problem with this patch.
In the Sarge installer, I see "Error while running 'modprobe -v sunlance'".
ISTR that if I use the netinstall iso and persist with the installation,
Lance works after the reboot.  This problem doesn't seem to affect Etch.)

Thanks,
-- 
Stuart Brady