Re: [Qemu-devel] SSE 'maxps' instruction bug?

[malc]

On Mon, 12 Mar 2007, Julian Seward wrote:

> The program below tests the 'maxps' instruction.  When run on
> qemu-0.9.0, host amd64, guest x86, guest OS redhat8, it prints:
>
>   f9a511d1 8d37d67f b34825b8 e2f40739
>
> scp the binary to a Core 2 (real) machine and run:
>
>   f9a511d1 22dcb9b9 b34825b8 e2f40739
>
> Second 32-bit word is completely different.
>
> This is 0.9.0 compiled from source using gcc-3.4.6, host openSuSE
> 10.2 on a Core 2 Duo in 64-bit mode.
>
> Any ideas?  I grepped the 0.9.0 sources for "maxps" but couldn't
> figure out where/how it is handled.

[..snip..]
ops_sse.h lines 711 and 670

QEMU and Core 2 Duo disagree on the handling of NaNs it seems.

http://courses.ece.uiuc.edu/ece390/books/labmanual/inst-ref-simd.html
- this implies that MAXPS should leave the NaNs alone, no idea how
normative that is though (and no IA32 manual at hand)

--
vale