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Re: [Qemu-devel] SSE 'maxps' instruction bug?
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From: |
Julian Seward |
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Subject: |
Re: [Qemu-devel] SSE 'maxps' instruction bug? |
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Date: |
Tue, 13 Mar 2007 14:03:06 +0000 |
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User-agent: |
KMail/1.9.5 |
> QEMU and Core 2 Duo disagree on the handling of NaNs it seems.
>
> http://courses.ece.uiuc.edu/ece390/books/labmanual/inst-ref-simd.html
> - this implies that MAXPS should leave the NaNs alone, no idea how
> normative that is though (and no IA32 manual at hand)
Having looked at an IA32 manual I'd say the inst-ref-simd.html
description agrees with it, so the Core 2 behaviour is what
qemu should do.
J