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From: | Alexander Voropay |
Subject: | Re: [Qemu-devel] [Bug] [Patch] MIPS code fails at branch instruction |
Date: | Tue, 20 Mar 2007 10:54:49 +0300 |
"Thiemo Seufer" <address@hidden> wrote:
For the AR7 case, could you - add AR7 as a CPU type - handle the interesting cases for AR7 only, after verifying the cornercase behaviour of qemu and real hardware is consistent.
AFAIK, Texas Instrument AR7 isn't a CPU. It's a SoC which combines well-known MIPS 4KEc synthesizable *core* and ADSL stuff. http://www.linux-mips.org/wiki/AR7 -- -=AV=-
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