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Re: [Qemu-devel] [RFC/experimental patch] qemu (x86_64 on x86_64 -no-kqe


From: Axel Zeuner
Subject: Re: [Qemu-devel] [RFC/experimental patch] qemu (x86_64 on x86_64 -no-kqemu) compiles with gcc4 and works
Date: Thu, 29 Mar 2007 08:03:14 +0200
User-agent: KMail/1.9.5

Hi Anthony,

On Thursday 29 March 2007 04:07, you wrote:
> Axel Zeuner wrote:
> > Hi Anthony,
> >
> > On Monday 26 March 2007 01:44, you wrote:
> >> Axel Zeuner wrote:
> >>> On Saturday 24 March 2007 21:15, Anthony Liguori wrote:
> >>>> The tricky thing I still can't figure out is how to get ASM_SOFTMMU
> >>>> working.  The problem is GLUE(st, SUFFIX) function.  First GCC cannot
> >>>> deal with the register pressure.  The problem I can't seem to fix
> >>>> though is that GCC sticks %1 in %esi because we're only using an "r"
> >>>> constraint, not a "q" constraint.  This results in the generation of
> >>>> %sib which is an invalid register.  However, refactoring the code to
> >>>> not require a "q" constraint doesn't seem to help either.
> >>>
> >>> Hi Anthony,
> >>> could you please try the attached patch for softmmu_header.h? Allows
> >>> compiling with gcc4 and ASM_SOFTMMU.
> >>
> >> That did the trick.  Could you explain what your changes did?
> >
> > QEMU/i386 has only 3 three available registers if TARGET_I386 is selected
> > because ebx,ebp,esi,edi are used by the environment and T0, T1, T3( AKA
> > A0). This makes inline assembly really ugly. The called external C
> > functions in ASM_SOFTMMU are REGPARM(1,2), i.e. require their first
> > arguments in eax, edx.
>
> Based on some feedback from Paul Brook, I wrote another patch that just
> disables the use of register variables for GCC4.  I think this is a
> considerably less hackish way to go about this.
>
> The generated code won't be as nice of course but at least it works.
> The patch applies against your cvtasm patches.
Looks good to me, sorry I had no time yet to test your patch. Did you check 
the performance impact of your changes? 
Perhaps it is possible to use register variables in dependence of the register 
count of the host processor.

Kind Regards
Axel




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