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Re: [Qemu-devel] sparc32 counter/timer issues
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From: |
Blue Swirl |
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Subject: |
Re: [Qemu-devel] sparc32 counter/timer issues |
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Date: |
Sun, 23 Sep 2007 15:08:39 +0300 |
On 9/22/07, Robert Reif <address@hidden> wrote:
> With the patch and ss10 boot prom I get:
>
> TIMER: write 0000000ff130000c 00000000
> TIMER: write 0000000ff1310010 00000001
> TIMER: write 0000000ff1300000 00000000
> TIMER: write 0000000ff1300004 00000000
> TIMER: write 0000000ff130000c 00000001
> TIMER: write 0000000ff1300000 00000000
> TIMER: write 0000000ff1300004 00000000
> TIMER: get_out: limit 7ffffe00 count 000000000
> TIMER: read 0000000ff1300000 = 00000000
>
> with the last two lines repeating forever.
>From this I gather that the user timer mode is not very well
implemented. Can you try if this updated version of the patch changes
anything?
timer_fix.diff
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