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Re: [Qemu-devel] RFC: reverse-endian softmmu memory accessors


From: Blue Swirl
Subject: Re: [Qemu-devel] RFC: reverse-endian softmmu memory accessors
Date: Sat, 13 Oct 2007 13:47:09 +0300

On 10/13/07, J. Mayer <address@hidden> wrote:
> The problem:
> some CPU architectures, namely PowerPC and maybe others, offers
> facilities to access the memory or I/O in the reverse endianness, ie
> little-endian instead of big-endian for PowerPC, or provide instruction
> to make memory accesses in the "reverse-endian". This is implemented as
> a global flag on some CPU. This case is already handled by the PowerPC
> emulation but is is far from being optimal. Some other implementations
> allow the OS to store an "reverse-endian" flag in the TLB or the segment
> descriptors, thus providing per-page or per-segment endianness control.
> This is mostly used to ease driver migration from a PC platform to
> PowerPC without taking any care of the device endianness in the driver
> code (yes, this is bad...).

Nice, this may be useful for Sparc64. It has a global CPU flag for
endianness, individual pages can be marked as reverse endian, and
finally there are instructions that access memory in reverse endian.
The end result is a XOR of all these reverses. Though I don't know if
any of these features are used at all.

Other memory access functions could be merged too. Is the 32 bit load
with sign extension to 64 bits used in other architectures?




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