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Re: [Qemu-devel] about cache model in ARM emulation
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From: |
Daniel Jacobowitz |
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Subject: |
Re: [Qemu-devel] about cache model in ARM emulation |
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Date: |
Thu, 18 Oct 2007 10:09:34 -0400 |
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User-agent: |
Mutt/1.5.15 (2007-04-09) |
On Thu, Oct 18, 2007 at 06:57:19AM -0700, Boy Dfx wrote:
> From what I can see instructions are loaded from memory without a
> clock cycle penalty, but I wanted to be sure.
Yes. Qemu is absolutely useless for performance questions about
real hardware; it does not model any cycles.
--
Daniel Jacobowitz
CodeSourcery