Re: [Qemu-devel] sparc hflags support?

[Paul Brook]

On Sunday 04 November 2007, Robert Reif wrote:
> I'm looking at adding more complete support for different sparc32
> CPUs, MMUs,  cache controllers and systems.
>
> Each CPU/MMU/cache controller combination is slightly different and
> requires its own unique state.  For example the two CPUs currently
> supported save the boot mode in different bits in the MMU control
> register: 0x2000 for the SuperSparc and 0x4000 for the TurboSparc.
> Others bits will need to be saved in the MMU and cache controllers
> as better hardware emulation is added.

If it's something that only changes rarely (e.g. when switching from early 
boot to a real OS environment) you can just do a tb flush.

Does mmu/cache mode actually effect the instruction semantics? 

Paul