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[Qemu-devel] [PPC] FPIMM macro and mtfsfi instruction
From: |
claude vittoria |
Subject: |
[Qemu-devel] [PPC] FPIMM macro and mtfsfi instruction |
Date: |
Mon, 17 Dec 2007 15:52:56 +0100 (CET) |
Hi everybody,
I think that I get a wrong result with mtfsfi instruction.
I think to get a solution, see below.
Could you confirm my opinion ?
Thanks,
Claude
translate.c
l344:EXTRACT_HELPER(crbD, 21, 5);
...
l375:EXTRACT_HELPER(FPIMM, 20, 4); <======FPIMM must be (FPIMM, 12, 4) or crbB
>> 1 for mtfsfi; IMM is bits[16-19] of the instruction in PPC programming
environnement 32bit (p8-135). IMM is not one bit before crbD.
...
l2049
/* mtfsfi */
GEN_HANDLER(mtfsfi, 0x3F, 0x06, 0x04, 0x006f0800, PPC_FLOAT)
{
int bf, sh;
if (unlikely(!ctx->fpu_enabled)) {
GEN_EXCP_NO_FP(ctx);
return;
}
bf = crbD(ctx->opcode) >> 2; <======================Ok
bits[6-8]
sh = 7 - bf;
gen_optimize_fprf();
gen_op_set_FT0(FPIMM(ctx->opcode) << (4 * sh)); <===================FPIMM
is not correct, does not return the right value but bits [8-11]
gen_reset_fpstatus();
gen_op_store_fpscr(1 << sh);
if (unlikely(Rc(ctx->opcode) != 0)) {
gen_op_load_fpcc();
gen_op_set_Rc0();
}
/* We can raise a differed exception */
gen_op_float_check_status();
}
- [Qemu-devel] [PPC] FPIMM macro and mtfsfi instruction,
claude vittoria <=