[Qemu-devel] [PATCH] [MIPS] Fix infinite loop when invalidating TLB

[Hervé Poussineau]

Hi,

In certain conditions, MIPS R4K TLB invalidation can lead to an infinite 
loop.
If 'end' address is 0xffffffffffffffff, invalidation loop should stop 
once 'addr' has flushed address 0xfffffffffffff000.
Attached patch fixes this issue.

Hervé

Index: target-mips/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-mips/helper.c,v
retrieving revision 1.63
diff -u -r1.63 target-mips/helper.c
--- target-mips/helper.c        4 Jan 2008 17:52:57 -0000       1.63
+++ target-mips/helper.c        28 Mar 2008 07:47:46 -0000
@@ -630,7 +630,7 @@
         }
 #endif
         end = addr | mask;
-        while (addr < end) {
+        while (addr - 1 < end) {
             tlb_flush_page (env, addr);
             addr += TARGET_PAGE_SIZE;
         }