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[Qemu-devel][BUG][PATCH] Change MIPS register access
From: |
Stefan Weil |
Subject: |
[Qemu-devel][BUG][PATCH] Change MIPS register access |
Date: |
Sun, 20 Apr 2008 12:32:46 +0200 |
User-agent: |
Mozilla-Thunderbird 2.0.0.9 (X11/20080109) |
Thiemo Seufer schrieb:
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 08/02/12 21:01:26
Modified files:
. : gdbstub.c
linux-user : main.c signal.c syscall.c
linux-user/mips: target_signal.h
linux-user/mips64: target_signal.h
linux-user/mipsn32: target_signal.h
target-mips : cpu.h op.c op_helper.c op_template.c
translate.c
Log message:
Make MIPS MT implementation more cache friendly.
Appendix mips.patch tries to complete Thiemo's changes.
Please check it and add it to QEMU trunk if it is correct.
I don't have a test scenario which could test the effects
of the patch.
Regards
Stefan Weil
Index: target-mips/op.c
===================================================================
--- target-mips/op.c (revision 4209)
+++ target-mips/op.c (working copy)
@@ -2300,7 +2300,7 @@
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- T0 = env->gpr[PARAM1][other_tc];
+ T0 = env->gpr[other_tc][PARAM1];
FORCE_RET();
}
@@ -2308,7 +2308,7 @@
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- T0 = env->LO[PARAM1][other_tc];
+ T0 = env->LO[other_tc][PARAM1];
FORCE_RET();
}
@@ -2316,7 +2316,7 @@
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- T0 = env->HI[PARAM1][other_tc];
+ T0 = env->HI[other_tc][PARAM1];
FORCE_RET();
}
@@ -2324,7 +2324,7 @@
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- T0 = env->ACX[PARAM1][other_tc];
+ T0 = env->ACX[other_tc][PARAM1];
FORCE_RET();
}
@@ -2340,7 +2340,7 @@
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- T0 = env->gpr[PARAM1][other_tc];
+ T0 = env->gpr[other_tc][PARAM1];
FORCE_RET();
}
@@ -2348,7 +2348,7 @@
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- T0 = env->LO[PARAM1][other_tc];
+ T0 = env->LO[other_tc][PARAM1];
FORCE_RET();
}
@@ -2356,7 +2356,7 @@
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- T0 = env->HI[PARAM1][other_tc];
+ T0 = env->HI[other_tc][PARAM1];
FORCE_RET();
}
@@ -2364,7 +2364,7 @@
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- T0 = env->ACX[PARAM1][other_tc];
+ T0 = env->ACX[other_tc][PARAM1];
FORCE_RET();
}
Index: target-mips/op_template.c
===================================================================
--- target-mips/op_template.c (revision 4209)
+++ target-mips/op_template.c (working copy)
@@ -52,13 +52,13 @@
void glue(op_load_srsgpr_T0_gpr, REG) (void)
{
- T0 = env->gpr[REG][(env->CP0_SRSCtl >> CP0SRSCtl_PSS) & 0xf];
+ T0 = env->gpr[(env->CP0_SRSCtl >> CP0SRSCtl_PSS) & 0xf][REG];
FORCE_RET();
}
void glue(op_store_T0_srsgpr_gpr, REG) (void)
{
- env->gpr[REG][(env->CP0_SRSCtl >> CP0SRSCtl_PSS) & 0xf] = T0;
+ env->gpr[(env->CP0_SRSCtl >> CP0SRSCtl_PSS) & 0xf][REG] = T0;
FORCE_RET();
}
#endif
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