[Qemu-devel] PCI IRQ routing

[Alexander Graf]

Hi,

while trying to implement improved APIC support, I stumbled across a  
pretty serious problem. As far as I read the sources to the PCI  
devices in qemu, they are based on the assumption that their  
interrupts are Active High.

According to the PCI 3.0 Spec, "Interrupts on PCI are optional and  
defined as 'level sensitive', asserted low (negative one) using open  
drain output drivers". This stands in contrast to the way PCI  
interrupts are implemented atm.

Am I overseeing something or is this intended behavior?

Alex