[Qemu-devel] Patch-ppc: fix efstst* instructions

[Tristan Gingold]

Hi,

the efstst* instructions set bit 2 (bit 1 in BE notation) of crX.
This patch fixes this bug.

Tristan.

Index: target-ppc/op_helper.h
===================================================================
--- target-ppc/op_helper.h      (revision 4355)
+++ target-ppc/op_helper.h      (working copy)
@@ -332,21 +332,21 @@
     CPU_FloatU u1, u2;
     u1.l = op1;
     u2.l = op2;
-    return float32_lt(u1.f, u2.f, &env->spe_status) ? 1 : 0;
+    return float32_lt(u1.f, u2.f, &env->spe_status) ? 4 : 0;
 }
 static always_inline int _do_efststgt (uint32_t op1, uint32_t op2)
 {
     CPU_FloatU u1, u2;
     u1.l = op1;
     u2.l = op2;
-    return float32_le(u1.f, u2.f, &env->spe_status) ? 0 : 1;
+    return float32_le(u1.f, u2.f, &env->spe_status) ? 0 : 4;
 }
 static always_inline int _do_efststeq (uint32_t op1, uint32_t op2)
 {
     CPU_FloatU u1, u2;
     u1.l = op1;
     u2.l = op2;
-    return float32_eq(u1.f, u2.f, &env->spe_status) ? 1 : 0;
+    return float32_eq(u1.f, u2.f, &env->spe_status) ? 4 : 0;
 }
 /* Double precision floating-point helpers */
 static always_inline int _do_efdtstlt (uint64_t op1, uint64_t op2)
@@ -354,20 +354,20 @@
     CPU_DoubleU u1, u2;
     u1.ll = op1;
     u2.ll = op2;
-    return float64_lt(u1.d, u2.d, &env->spe_status) ? 1 : 0;
+    return float64_lt(u1.d, u2.d, &env->spe_status) ? 4 : 0;
 }
 static always_inline int _do_efdtstgt (uint64_t op1, uint64_t op2)
 {
     CPU_DoubleU u1, u2;
     u1.ll = op1;
     u2.ll = op2;
-    return float64_le(u1.d, u2.d, &env->spe_status) ? 0 : 1;
+    return float64_le(u1.d, u2.d, &env->spe_status) ? 0 : 4;
 }
 static always_inline int _do_efdtsteq (uint64_t op1, uint64_t op2)
 {
     CPU_DoubleU u1, u2;
     u1.ll = op1;
     u2.ll = op2;
-    return float64_eq(u1.d, u2.d, &env->spe_status) ? 1 : 0;
+    return float64_eq(u1.d, u2.d, &env->spe_status) ? 4 : 0;
 }
 #endif