[Qemu-devel] [4561] Implement 64-bit constant loads

[Blue Swirl]

Revision: 4561
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4561
Author:   blueswir1
Date:     2008-05-24 18:09:50 +0000 (Sat, 24 May 2008)

Log Message:
-----------
Implement 64-bit constant loads

Modified Paths:
--------------
    trunk/tcg/sparc/tcg-target.c

Modified: trunk/tcg/sparc/tcg-target.c
===================================================================
--- trunk/tcg/sparc/tcg-target.c        2008-05-24 18:06:35 UTC (rev 4560)
+++ trunk/tcg/sparc/tcg-target.c        2008-05-24 18:09:50 UTC (rev 4561)
@@ -267,24 +267,37 @@
     tcg_out32(s, SETHI | INSN_RD(ret) | ((arg & 0xfffffc00) >> 10));
 }
 
-static inline void tcg_out_movi(TCGContext *s, TCGType type,
-                                int ret, tcg_target_long arg)
+static inline void tcg_out_movi_imm13(TCGContext *s, int ret, uint32_t arg)
 {
-#if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
-    if (!check_fit_tl(arg, 32) && (arg & ~0xffffffff) != 0)
-        fprintf(stderr, "unimplemented %s with constant %ld\n", __func__, arg);
-#endif
+    tcg_out_arithi(s, ret, TCG_REG_G0, arg, ARITH_OR);
+}
+
+static inline void tcg_out_movi_imm32(TCGContext *s, int ret, uint32_t arg)
+{
     if (check_fit_i32(arg, 13))
-        tcg_out32(s, ARITH_OR | INSN_RD(ret) | INSN_RS1(TCG_REG_G0) |
-                  INSN_IMM13(arg));
+        tcg_out_movi_imm13(s, ret, arg);
     else {
         tcg_out_sethi(s, ret, arg);
         if (arg & 0x3ff)
-            tcg_out32(s, ARITH_OR | INSN_RD(ret) | INSN_RS1(ret) |
-                      INSN_IMM13(arg & 0x3ff));
+            tcg_out_arithi(s, ret, ret, arg & 0x3ff, ARITH_OR);
     }
 }
 
+static inline void tcg_out_movi(TCGContext *s, TCGType type,
+                                int ret, tcg_target_long arg)
+{
+#if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
+    if (!check_fit_tl(arg, 32) && (arg & ~0xffffffffULL) != 0) {
+        // XXX ret may be I5, need another temp
+        tcg_out_movi_imm32(s, TCG_REG_I5, arg >> 32);
+        tcg_out_arithi(s, TCG_REG_I5, TCG_REG_I5, 32, SHIFT_SLLX);
+        tcg_out_movi_imm32(s, ret, arg);
+        tcg_out_arith(s, ret, ret, TCG_REG_I5, ARITH_OR);
+    } else
+#endif
+        tcg_out_movi_imm32(s, ret, arg);
+}
+
 static inline void tcg_out_ld_raw(TCGContext *s, int ret,
                                   tcg_target_long arg)
 {
@@ -296,15 +309,14 @@
 static inline void tcg_out_ld_ptr(TCGContext *s, int ret,
                                   tcg_target_long arg)
 {
+    if (!check_fit_tl(arg, 10))
+        tcg_out_movi(s, TCG_TYPE_PTR, ret, arg & ~0x3ffULL);
 #if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
-    if (!check_fit_tl(arg, 32) && (arg & ~0xffffffff) != 0)
-        fprintf(stderr, "unimplemented %s with offset %ld\n", __func__, arg);
-    if (!check_fit_i32(arg, 13))
-        tcg_out_sethi(s, ret, arg);
     tcg_out32(s, LDX | INSN_RD(ret) | INSN_RS1(ret) |
               INSN_IMM13(arg & 0x3ff));
 #else
-    tcg_out_ld_raw(s, ret, arg);
+    tcg_out32(s, LDUW | INSN_RD(ret) | INSN_RS1(ret) |
+              INSN_IMM13(arg & 0x3ff));
 #endif
 }