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[Qemu-devel] [PATCH] Fix several spelling bugs
From: |
Stefan Weil |
Subject: |
[Qemu-devel] [PATCH] Fix several spelling bugs |
Date: |
Sun, 01 Jun 2008 20:30:01 +0200 |
User-agent: |
Mozilla-Thunderbird 2.0.0.14 (X11/20080509) |
This patch fixes several spelling bugs:
explicitely -> explicitly
stabalized -> stabilized
priveledged -> privileged
privledge,priledge -> privilege
shoud -> should
Please apply it to Qemu trunk.
Regards
Stefan
Index: linux-user/qemu.h
===================================================================
--- linux-user/qemu.h (revision 4638)
+++ linux-user/qemu.h (working copy)
@@ -386,7 +386,7 @@
}
/* Unlock an area of guest memory. The first LEN bytes must be
- flushed back to guest memory. host_ptr = NULL is explicitely
+ flushed back to guest memory. host_ptr = NULL is explicitly
allowed and does nothing. */
static inline void unlock_user(void *host_ptr, abi_ulong guest_addr,
long len)
Index: linux-user/path.c
===================================================================
--- linux-user/path.c (revision 4638)
+++ linux-user/path.c (working copy)
@@ -82,7 +82,7 @@
return root;
}
-/* This needs to be done after tree is stabalized (ie. no more reallocs!). */
+/* This needs to be done after tree is stabilized (ie. no more reallocs!). */
static void set_parents(struct pathelem *child, struct pathelem *parent)
{
unsigned int i;
Index: target-ppc/translate.c
===================================================================
--- target-ppc/translate.c (revision 4638)
+++ target-ppc/translate.c (working copy)
@@ -287,7 +287,7 @@
typedef struct opcode_t {
unsigned char opc1, opc2, opc3;
-#if HOST_LONG_BITS == 64 /* Explicitely align to 64 bits */
+#if HOST_LONG_BITS == 64 /* Explicitly align to 64 bits */
unsigned char pad[5];
#else
unsigned char pad[1];
Index: qemu-tech.texi
===================================================================
--- qemu-tech.texi (revision 4638)
+++ qemu-tech.texi (working copy)
@@ -277,7 +277,7 @@
qemu-fast system emulator. It requires a patched Linux kernel to work
(you cannot launch the same kernel on your PC), but the patches are
really small. As it is a PC virtualizer (no emulation is done except
-for some priveledged instructions), it has the potential of being
+for some privileged instructions), it has the potential of being
faster than QEMU. The downside is that a complicated (and potentially
unsafe) host kernel patch is needed.
@@ -334,7 +334,7 @@
result (called @code{CC_DST}) and the type of operation (called
@code{CC_OP}).
address@hidden is almost never explicitely set in the generated code
address@hidden is almost never explicitly set in the generated code
because it is known at translation time.
In order to increase performances, a backward pass is performed on the
Index: exec-all.h
===================================================================
--- exec-all.h (revision 4638)
+++ exec-all.h (working copy)
@@ -216,7 +216,7 @@
{
/* patch the branch destination */
*(uint32_t *)jmp_addr = addr - (jmp_addr + 4);
- /* no need to flush icache explicitely */
+ /* no need to flush icache explicitly */
}
#elif defined(__arm__)
static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long
addr)
Index: target-i386/cpu.h
===================================================================
--- target-i386/cpu.h (revision 4638)
+++ target-i386/cpu.h (working copy)
@@ -351,7 +351,7 @@
enum {
CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */
- CC_OP_EFLAGS, /* all cc are explicitely computed, CC_SRC = flags */
+ CC_OP_EFLAGS, /* all cc are explicitly computed, CC_SRC = flags */
CC_OP_MULB, /* modify all flags, C, O = (CC_SRC != 0) */
CC_OP_MULW,
Index: hw/integratorcp.c
===================================================================
--- hw/integratorcp.c (revision 4638)
+++ hw/integratorcp.c (working copy)
@@ -494,7 +494,7 @@
}
ram_offset = qemu_ram_alloc(ram_size);
/* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */
- /* ??? RAM shoud repeat to fill physical memory space. */
+ /* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero*/
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
/* And again at address 0x80000000 */
Index: hw/versatilepb.c
===================================================================
--- hw/versatilepb.c (revision 4638)
+++ hw/versatilepb.c (working copy)
@@ -182,7 +182,7 @@
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
- /* ??? RAM shoud repeat to fill physical memory space. */
+ /* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
Index: hw/scsi-disk.c
===================================================================
--- hw/scsi-disk.c (revision 4638)
+++ hw/scsi-disk.c (working copy)
@@ -662,7 +662,7 @@
case 0x46:
DPRINTF("Get Configuration (rt %d, maxlen %d)\n", buf[1] & 3, len);
memset(outbuf, 0, 8);
- /* ??? This shoud probably return much more information. For now
+ /* ??? This should probably return much more information. For now
just return the basic header indicating the CD-ROM profile. */
outbuf[7] = 8; // CD-ROM
r->buf_len = 8;
Index: hw/realview.c
===================================================================
--- hw/realview.c (revision 4638)
+++ hw/realview.c (working copy)
@@ -64,7 +64,7 @@
}
}
- /* ??? RAM shoud repeat to fill physical memory space. */
+ /* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
Index: hw/alpha_palcode.c
===================================================================
--- hw/alpha_palcode.c (revision 4638)
+++ hw/alpha_palcode.c (working copy)
@@ -55,7 +55,7 @@
};
#if 0
-/* One must explicitely check that the TB is valid and the FOE bit is reset */
+/* One must explicitly check that the TB is valid and the FOE bit is reset */
static void update_itb (void)
{
/* This writes into a temp register, not the actual one */
Index: tcg/tcg.c
===================================================================
--- tcg/tcg.c (revision 4638)
+++ tcg/tcg.c (working copy)
@@ -1406,7 +1406,7 @@
propagation */
tcg_out_movi(s, ots->type, ots->reg, val);
} else {
- /* The movi is not explicitely generated here */
+ /* The movi is not explicitly generated here */
if (ots->val_type == TEMP_VAL_REG)
s->reg_to_temp[ots->reg] = -1;
ots->val_type = TEMP_VAL_CONST;
Index: target-i386/op_helper.c
===================================================================
--- target-i386/op_helper.c (revision 4638)
+++ target-i386/op_helper.c (working copy)
@@ -689,7 +689,7 @@
}
dpl = (e2 >> DESC_DPL_SHIFT) & 3;
cpl = env->hflags & HF_CPL_MASK;
- /* check privledge if software int */
+ /* check privilege if software int */
if (is_int && dpl < cpl)
raise_exception_err(EXCP0D_GPF, intno * 8 + 2);
/* check valid bit */
@@ -900,7 +900,7 @@
}
dpl = (e2 >> DESC_DPL_SHIFT) & 3;
cpl = env->hflags & HF_CPL_MASK;
- /* check privledge if software int */
+ /* check privilege if software int */
if (is_int && dpl < cpl)
raise_exception_err(EXCP0D_GPF, intno * 16 + 2);
/* check valid bit */
@@ -1166,7 +1166,7 @@
dpl = (e2 >> DESC_DPL_SHIFT) & 3;
cpl = env->hflags & HF_CPL_MASK;
- /* check privledge if software int */
+ /* check privilege if software int */
if (is_int && dpl < cpl)
raise_exception_err(EXCP0D_GPF, (intno << shift) + 2);
@@ -2698,7 +2698,7 @@
sp += addend;
if (rpl == cpl && (!(env->hflags & HF_CS64_MASK) ||
((env->hflags & HF_CS64_MASK) && !is_iret))) {
- /* return to same priledge level */
+ /* return to same privilege level */
cpu_x86_load_seg_cache(env, R_CS, new_cs,
get_seg_base(e1, e2),
get_seg_limit(e1, e2),
- [Qemu-devel] [PATCH] Fix several spelling bugs,
Stefan Weil <=