[Qemu-devel] [4669] save more CPU state

[Fabrice Bellard]

Revision: 4669
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4669
Author:   bellard
Date:     2008-06-04 18:29:25 +0000 (Wed, 04 Jun 2008)

Log Message:
-----------
save more CPU state

Modified Paths:
--------------
    trunk/hw/pc.c
    trunk/target-i386/cpu.h
    trunk/target-i386/machine.c

Modified: trunk/hw/pc.c
===================================================================
--- trunk/hw/pc.c       2008-06-04 17:39:33 UTC (rev 4668)
+++ trunk/hw/pc.c       2008-06-04 18:29:25 UTC (rev 4669)
@@ -766,7 +766,7 @@
             /* XXX: enable it in all cases */
             env->cpuid_features |= CPUID_APIC;
         }
-        register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
+        register_savevm("cpu", i, 5, cpu_save, cpu_load, env);
         qemu_register_reset(main_cpu_reset, env);
         if (pci_enabled) {
             apic_init(env);

Modified: trunk/target-i386/cpu.h
===================================================================
--- trunk/target-i386/cpu.h     2008-06-04 17:39:33 UTC (rev 4668)
+++ trunk/target-i386/cpu.h     2008-06-04 18:29:25 UTC (rev 4669)
@@ -541,8 +541,8 @@
     uint64_t efer;
     uint64_t star;
 
-    target_phys_addr_t vm_hsave;
-    target_phys_addr_t vm_vmcb;
+    uint64_t vm_hsave;
+    uint64_t vm_vmcb;
     uint64_t tsc_offset;
     uint64_t intercept;
     uint16_t intercept_cr_read;

Modified: trunk/target-i386/machine.c
===================================================================
--- trunk/target-i386/machine.c 2008-06-04 17:39:33 UTC (rev 4668)
+++ trunk/target-i386/machine.c 2008-06-04 18:29:25 UTC (rev 4669)
@@ -120,6 +120,21 @@
     qemu_put_be64s(f, &env->kernelgsbase);
 #endif
     qemu_put_be32s(f, &env->smbase);
+
+    qemu_put_be64s(f, &env->pat);
+    qemu_put_be32s(f, &env->hflags2);
+    qemu_put_be32s(f, (uint32_t *)&env->halted);
+    
+    qemu_put_be64s(f, &env->vm_hsave);
+    qemu_put_be64s(f, &env->vm_vmcb);
+    qemu_put_be64s(f, &env->tsc_offset);
+    qemu_put_be64s(f, &env->intercept);
+    qemu_put_be16s(f, &env->intercept_cr_read);
+    qemu_put_be16s(f, &env->intercept_cr_write);
+    qemu_put_be16s(f, &env->intercept_dr_read);
+    qemu_put_be16s(f, &env->intercept_dr_write);
+    qemu_put_be32s(f, &env->intercept_exceptions);
+    qemu_put_8s(f, &env->v_tpr);
 }
 
 #ifdef USE_X86LDOUBLE
@@ -154,7 +169,7 @@
     uint16_t fpus, fpuc, fptag, fpregs_format;
     int32_t a20_mask;
 
-    if (version_id != 3 && version_id != 4)
+    if (version_id != 3 && version_id != 4 && version_id != 5)
         return -EINVAL;
     for(i = 0; i < CPU_NB_REGS; i++)
         qemu_get_betls(f, &env->regs[i]);
@@ -258,10 +273,27 @@
     qemu_get_be64s(f, &env->fmask);
     qemu_get_be64s(f, &env->kernelgsbase);
 #endif
-    if (version_id >= 4)
+    if (version_id >= 4) {
         qemu_get_be32s(f, &env->smbase);
+    }
+    if (version_id >= 5) {
+        qemu_get_be64s(f, &env->pat);
+        qemu_get_be32s(f, &env->hflags2);
+        qemu_get_be32s(f, (uint32_t *)&env->halted);
 
-    /* XXX: compute hflags from scratch, except for CPL and IIF */
+        qemu_get_be64s(f, &env->vm_hsave);
+        qemu_get_be64s(f, &env->vm_vmcb);
+        qemu_get_be64s(f, &env->tsc_offset);
+        qemu_get_be64s(f, &env->intercept);
+        qemu_get_be16s(f, &env->intercept_cr_read);
+        qemu_get_be16s(f, &env->intercept_cr_write);
+        qemu_get_be16s(f, &env->intercept_dr_read);
+        qemu_get_be16s(f, &env->intercept_dr_write);
+        qemu_get_be32s(f, &env->intercept_exceptions);
+        qemu_get_8s(f, &env->v_tpr);
+    }
+    /* XXX: ensure compatiblity for halted bit ? */
+    /* XXX: compute redundant hflags bits */
     env->hflags = hflags;
     tlb_flush(env, 1);
     return 0;