[Qemu-devel] [PATCH 8/x] ppc: Convert op_set_FT0 to TCG

[Andreas Färber]

Replace op_set_FT0 with tcg_gen_movi_i64.

Signed-off-by: Andreas Faerber <address@hidden>

---
Here's a small one since we now seem to be both working on ppc.

I'm not sure if this is correct since the dyngen op set the upper half  
to zero. Do we need an explicit cast to 32 bits for the immediate  
argument to assure they will be zero? Or was that just to avoid  
garbage with dyngen?

Andreas

 target-ppc/op.c        |   10 ----------
 target-ppc/translate.c |    2 +-
 2 files changed, 1 insertions(+), 11 deletions(-)

diff --git a/target-ppc/op.c b/target-ppc/op.c
index a31b41f..81329e3 100644
--- a/target-ppc/op.c
+++ b/target-ppc/op.c
@@ -424,16 +424,6 @@ void OPPROTO op_load_fpscr_FT0 (void)
     RETURN();
 }

-void OPPROTO op_set_FT0 (void)
-{
-    CPU_DoubleU u;
-
-    u.l.upper = 0;
-    u.l.lower = PARAM1;
-    FT0 = u.d;
-    RETURN();
-}
-
 void OPPROTO op_load_fpscr_T0 (void)
 {
     T0 = (env->fpscr >> PARAM1) & 0xF;
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 9dd2506..5139ae6 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2090,7 +2090,7 @@ GEN_HANDLER(mtfsfi, 0x3F, 0x06, 0x04,  
0x006f0800, PPC_FLOAT)
     bf = crbD(ctx->opcode) >> 2;
     sh = 7 - bf;
     gen_optimize_fprf();
-    gen_op_set_FT0(FPIMM(ctx->opcode) << (4 * sh));
+    tcg_gen_movi_i64(cpu_FT[0], FPIMM(ctx->opcode) << (4 * sh));
     gen_reset_fpstatus();
     gen_op_store_fpscr(1 << sh);
     if (unlikely(Rc(ctx->opcode) != 0)) {
--
1.5.5.1

op_set_FT0.patch
Description: Binary data