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[Qemu-devel] sparc y register


From: Vince Weaver
Subject: [Qemu-devel] sparc y register
Date: Thu, 11 Sep 2008 11:00:32 -0400 (EDT)

Hello

I'm wasting a lot of time trying to get the sixtrack spec2k benchmark going. (It crashes 30 minutes into the program, deep in a long FORTRAN program). One of the problems eventually traces back to a routine reading long floating point numbers from a text file.

In any case, part of the problem is that the write y instruction is writing a 64-bit value, but from what I can tell in the documentation the top 32-bits of y should always be zero.

What this means is sometimes in sparc32plus mode, we write a register to y that has some of the higher 32 bits set, which causes later mulscc instructions to get the wrong results.

The patch below seems to fix this particular problem (and a test case I have that exhibits it) but it seems as if there's still another bug at work somewhere because sixtrack still won't run.

Vince

Index: target-sparc/translate.c
===================================================================
--- target-sparc/translate.c    (revision 5193)
+++ target-sparc/translate.c    (working copy)
@@ -3196,6 +3196,7 @@
                             switch(rd) {
                             case 0: /* wry */
                                 tcg_gen_xor_tl(cpu_y, cpu_src1, cpu_src2);
+                               tcg_gen_andi_tl(cpu_y,cpu_y,0xffffffff);
                                 break;
 #ifndef TARGET_SPARC64
                             case 0x01 ... 0x0f: /* undefined in the




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