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Re: [Qemu-devel] sparc y register


From: Vince Weaver
Subject: Re: [Qemu-devel] sparc y register
Date: Fri, 12 Sep 2008 11:36:15 -0400 (EDT)


On Thu, 11 Sep 2008, Blue Swirl wrote:
Thanks, I applied a fix based on this. There was also a similar
problem in mulscc, maybe your tests run better now?

So it turns out there are three problems:
  1.  mulscc when y has upper word bits set
  2.  mulscc when src1 has upper word bits set
  3.  mulscc when src2 has upper word bits set

The patch from yesterday fixed case 1, but there were still problems for 2&3.

Below is a patch I made that seems to get this all working properly. I've also attached a small test program that exhibits the 3 problems...

I'm running the big Fortran program again, but it would take a few hours to finish if this is a proper fix so I thought I'd send this off now rather than waiting.

Vince

Index: target-sparc/translate.c
===================================================================
--- target-sparc/translate.c    (revision 5196)
+++ target-sparc/translate.c    (working copy)
@@ -708,7 +708,7 @@
     // env->y = (b2 << 31) | (env->y >> 1);
     tcg_gen_andi_tl(r_temp, cpu_cc_src, 0x1);
     tcg_gen_shli_tl(r_temp, r_temp, 31);
-    tcg_gen_shri_tl(cpu_tmp0, cpu_y, 1);
+    tcg_gen_shri_i32(cpu_tmp0, cpu_y, 1);
     tcg_gen_or_tl(cpu_tmp0, cpu_tmp0, r_temp);
     tcg_gen_andi_tl(cpu_y, cpu_tmp0, 0xffffffff);

@@ -721,11 +721,11 @@
     // T0 = (b1 << 31) | (T0 >> 1);
     // src1 = T0;
     tcg_gen_shli_tl(cpu_tmp0, cpu_tmp0, 31);
-    tcg_gen_shri_tl(cpu_cc_src, cpu_cc_src, 1);
-    tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, cpu_tmp0);
+    tcg_gen_shri_i32(cpu_cc_src, cpu_cc_src, 1);
+    tcg_gen_or_i32(cpu_cc_src, cpu_cc_src, cpu_tmp0);

     /* do addition and update flags */
-    tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
+    tcg_gen_add_i32(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);

     gen_cc_clear_icc();
     gen_cc_NZ_icc(cpu_cc_dst);

Attachment: mulscc.s
Description: Text document

Attachment: mulscc
Description: Binary data


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