[Qemu-devel] [5201] Fix mulscc with high bits set in either src1 or src2

[Blue Swirl]

Revision: 5201
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5201
Author:   blueswir1
Date:     2008-09-13 17:20:52 +0000 (Sat, 13 Sep 2008)

Log Message:
-----------
Fix mulscc with high bits set in either src1 or src2

Modified Paths:
--------------
    trunk/target-sparc/translate.c

Modified: trunk/target-sparc/translate.c
===================================================================
--- trunk/target-sparc/translate.c      2008-09-12 17:54:13 UTC (rev 5200)
+++ trunk/target-sparc/translate.c      2008-09-13 17:20:52 UTC (rev 5201)
@@ -697,9 +697,9 @@
     if (!(env->y & 1))
         T1 = 0;
     */
-    tcg_gen_mov_tl(cpu_cc_src, src1);
+    tcg_gen_andi_tl(cpu_cc_src, src1, 0xffffffff);
     tcg_gen_andi_tl(r_temp, cpu_y, 0x1);
-    tcg_gen_mov_tl(cpu_cc_src2, src2);
+    tcg_gen_andi_tl(cpu_cc_src2, src2, 0xffffffff);
     tcg_gen_brcondi_tl(TCG_COND_NE, r_temp, 0, l1);
     tcg_gen_movi_tl(cpu_cc_src2, 0);
     gen_set_label(l1);
@@ -709,6 +709,7 @@
     tcg_gen_andi_tl(r_temp, cpu_cc_src, 0x1);
     tcg_gen_shli_tl(r_temp, r_temp, 31);
     tcg_gen_shri_tl(cpu_tmp0, cpu_y, 1);
+    tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0x7fffffff);
     tcg_gen_or_tl(cpu_tmp0, cpu_tmp0, r_temp);
     tcg_gen_andi_tl(cpu_y, cpu_tmp0, 0xffffffff);