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Re: [Qemu-devel] [PATCH] SH: Add prefi, icbi, synco


From: Vladimir Prus
Subject: Re: [Qemu-devel] [PATCH] SH: Add prefi, icbi, synco
Date: Mon, 20 Oct 2008 20:31:19 +0400
User-agent: KMail/1.9.10

On Monday 20 October 2008 20:27:00 Paul Brook wrote:
> > > I disagree. This is something that should be done right from the start.
> > > Trying to fix it up later is a real pain.  Doing fine grained features
> > > isn't that hard. MIPS, sparc, arm, ppc, m68k and sparc already do this.
> > > IIRC binutils is only complicated because it tried to create a strict
> > > hieracy of features, rather than using feature bits.
> >
> > When we do it does not matter, but it is completely unrelated from this
> > patch, in that there are already plenty of instructions that are specific
> > to a certain CPU family that we don't perform an illegal instruction
> > exception for. Trying to force the prefi/icbi/synco cases to rework all 
> > of the existing instructions that aren't universal doesn't make a lot of
> > sense, as it is a clear incremental change of existing behaviour, rather
> > than a situation caused purely by the addition of these new instructions.
> 
> The only cpu we currently claim to support is SH4. When adding support for 
> other cores these should be properly conditionalized.  Unconditionally 
> implementing additional instructions is a regression. I don't consider "we'll 
> fix this at some undefined point in the future" to be a good enough answer. 

Can you outline what changes should I make to implement proper 
conditionalization?

Thanks,
Volodya




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