[Qemu-devel] [PATCH 2/3] sh4: Add IRL(4bit encoded interrupt input) support.

[takasi-y]

This patch adds IRL(4bit encoded interrupt input) support to SH. 

This exports following interface functions
 void sh_intc_set_irl(struct intc_source *s, int n) for CPU
 wire sh7750_irl(SH7750State *s) for Board.
and
 void wire_drive(wire w, int n) for actual operation.

Signed-off-by: Takashi YOSHII <address@hidden>

---
 hw/sh.h      |   26 ++++++++++++++++++++++++++
 hw/sh7750.c  |   40 +++++++++++++++++++++++++++++++++++++++-
 hw/sh_intc.c |   14 ++++++++++++++
 hw/sh_intc.h |    2 ++
 4 files changed, 81 insertions(+), 1 deletions(-)

diff --git a/hw/sh.h b/hw/sh.h
index 50a1ae9..4ddcbf0 100644
--- a/hw/sh.h
+++ b/hw/sh.h
@@ -45,4 +45,30 @@ void sh_serial_init (target_phys_addr_t base, int feat,
 /* tc58128.c */
 int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2);
 
+/* wire: simple abstraction of inter-module pin to pin connection. */
+
+typedef void (*wire_receiver)(void *o, int n);
+struct wire_t {
+       void *obj;
+       wire_receiver rcv;
+};
+typedef struct wire_t *wire;
+
+static inline wire wire_new(void)
+{
+       return (wire)qemu_mallocz(sizeof(struct wire_t));
+}
+
+static inline wire wire_set_receiver(wire w, void *rcv, void *obj)
+{
+       w->rcv = (wire_receiver)rcv;
+       w->obj = obj;
+       return w;
+}
+
+static inline void wire_drive(wire w, int n)
+{
+       w->rcv(w->obj, n);
+}
+
 #endif
diff --git a/hw/sh7750.c b/hw/sh7750.c
index 62c226e..4fe89ba 100644
--- a/hw/sh7750.c
+++ b/hw/sh7750.c
@@ -412,7 +412,9 @@ enum {
        UNUSED = 0,
 
        /* interrupt sources */
-       IRL0, IRL1, IRL2, IRL3, /* only IRLM mode supported */
+       IRL_0, IRL_1, IRL_2, IRL_3, IRL_4, IRL_5, IRL_6, IRL_7,
+       IRL_8, IRL_9, IRL_A, IRL_B, IRL_C, IRL_D, IRL_E,
+       IRL0, IRL1, IRL2, IRL3,
        HUDI, GPIOI,
        DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2, DMAC_DMTE3,
        DMAC_DMTE4, DMAC_DMTE5, DMAC_DMTE6, DMAC_DMTE7,
@@ -428,6 +430,8 @@ enum {
 
        /* interrupt groups */
        DMAC, PCIC1, TMU2, RTC, SCI1, SCIF, REF,
+       /* irl bundle */
+       IRL,
 
        NR_SOURCES,
 };
@@ -529,6 +533,29 @@ static struct intc_group groups_pci[] = {
                   PCIC1_PCIDMA0, PCIC1_PCIDMA1, PCIC1_PCIDMA2, PCIC1_PCIDMA3),
 };
 
+static struct intc_vect vectors_irl[] = {
+       INTC_VECT(IRL_0, 0x200),
+       INTC_VECT(IRL_1, 0x220),
+       INTC_VECT(IRL_2, 0x240),
+       INTC_VECT(IRL_3, 0x260),
+       INTC_VECT(IRL_4, 0x280),
+       INTC_VECT(IRL_5, 0x2a0),
+       INTC_VECT(IRL_6, 0x2c0),
+       INTC_VECT(IRL_7, 0x2e0),
+       INTC_VECT(IRL_8, 0x300),
+       INTC_VECT(IRL_9, 0x320),
+       INTC_VECT(IRL_A, 0x340),
+       INTC_VECT(IRL_B, 0x360),
+       INTC_VECT(IRL_C, 0x380),
+       INTC_VECT(IRL_D, 0x3a0),
+       INTC_VECT(IRL_E, 0x3c0),
+};
+
+static struct intc_group groups_irl[] = {
+       INTC_GROUP(IRL, IRL_0, IRL_1, IRL_2, IRL_3, IRL_4, IRL_5, IRL_6,
+               IRL_7, IRL_8, IRL_9, IRL_A, IRL_B, IRL_C, IRL_D, IRL_E),
+};
+
 /**********************************************************************
  Memory mapped cache and TLB
 **********************************************************************/
@@ -717,5 +744,16 @@ SH7750State *sh7750_init(CPUSH4State * cpu)
                                 NULL, 0);
     }
 
+    sh_intc_register_sources(&s->intc,
+                               _INTC_ARRAY(vectors_irl),
+                               _INTC_ARRAY(groups_irl));
     return s;
 }
+
+wire sh7750_irl(SH7750State *s)
+{
+    sh_intc_toggle_source(sh_intc_source(&s->intc, IRL),1,0);
+    return wire_set_receiver(wire_new(), sh_intc_set_irl,
+                sh_intc_source(&s->intc, IRL));
+}
+
diff --git a/hw/sh_intc.c b/hw/sh_intc.c
index 8d1674a..eadb4f2 100644
--- a/hw/sh_intc.c
+++ b/hw/sh_intc.c
@@ -451,3 +451,17 @@ int sh_intc_init(struct intc_desc *desc,
 
     return 0;
 }
+
+/* Assert IRL<n>if n=0..14, otherwise Deassert all */
+void sh_intc_set_irl(struct intc_source *s, int n)
+{
+    int i=0;
+    while((s = sh_intc_source(s->parent, s->next_enum_id))) {
+       if(n == i)
+           sh_intc_toggle_source(s, s->enable_count?0:1, s->asserted?0:1);
+       else
+           if(s->asserted)
+               sh_intc_toggle_source(s, 0, -1);
+       i++;
+    }
+}
diff --git a/hw/sh_intc.h b/hw/sh_intc.h
index d22a4a2..fc4c5e6 100644
--- a/hw/sh_intc.h
+++ b/hw/sh_intc.h
@@ -72,4 +72,6 @@ int sh_intc_init(struct intc_desc *desc,
                 struct intc_prio_reg *prio_regs,
                 int nr_prio_regs);
 
+void sh_intc_set_irl(struct intc_source *s, int n);
+
 #endif /* __SH_INTC_H__ */
-- 
1.5.4.3