[Qemu-devel] When should I use qemu_ram_alloc(), and how?

[takasi-y]

Hi,
# Reusing thread, to video memory allocation related question.
Could you please give me answer to my question ?

Attached diff is for adding cirrus_vga onto r2d, for explanatin.
The point is here.
-    cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, 0);
+    r = qemu_ram_alloc(SDRAM_SIZE);
+    cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, r);

Apparently, r2d had not used qemu_ram_alloc() (it is working, though).
I added it here without knowing well about qemu memory system
(this one is working fine, too).

Maybe, allocation is needed always(even when without VGA), isn't it?

Are there any restriction between alloced address and register address?
I am worried about it because PC seems to make them equal.

Cheers,
/yoshii

# This patch is not for being merged to the repository.
SH: r2d Add cirrus_vga support.
r2d doesn't have cirrus VGA on board, imagine it is in PCI slot.
I have to reduce cirrus_vga PCI memory window size 32M to 8M,
because SH has only 16MB linear space for PCI.

Signed-off-by: Takashi YOSHII <address@hidden>
---
 Makefile.target |    2 +-
 hw/cirrus_vga.c |    2 +-
 hw/r2d.c        |    9 +++++++--
 3 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/Makefile.target b/Makefile.target
index dedb944..36f1273 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -726,7 +726,7 @@ endif
 ifeq ($(TARGET_BASE_ARCH), sh4)
 OBJS+= shix.o r2d.o sh7750.o sh7750_regnames.o tc58128.o
 OBJS+= sh_timer.o ptimer.o sh_serial.o sh_intc.o sh_pci.o
-OBJS+= ide.o
+OBJS+= ide.o vga.o cirrus_vga.o
 endif
 ifeq ($(TARGET_BASE_ARCH), m68k)
 OBJS+= an5206.o mcf5206.o ptimer.o mcf_uart.o mcf_intc.o mcf5208.o mcf_fec.o
diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index af9c9e6..286dfe1 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -3311,7 +3311,7 @@ void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, 
uint8_t *vga_ram_base,
     /* memory #0 LFB */
     /* memory #1 memory-mapped I/O */
     /* XXX: s->vram_size must be a power of two */
-    pci_register_io_region((PCIDevice *)d, 0, 0x2000000,
+    pci_register_io_region((PCIDevice *)d, 0, vga_ram_size,
                           PCI_ADDRESS_SPACE_MEM_PREFETCH, cirrus_pci_lfb_map);
     if (device_id == CIRRUS_ID_CLGD5446) {
         pci_register_io_region((PCIDevice *)d, 1, CIRRUS_PNPMMIO_SIZE,
diff --git a/hw/r2d.c b/hw/r2d.c
index 54529ca..c1f7e92 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -207,6 +207,7 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
     qemu_irq *irq;
     PCIBus *pci;
     int i;
+    ram_addr_t r;
 
     if (!cpu_model)
         cpu_model = "SH7751R";
@@ -218,11 +219,15 @@ static void r2d_init(ram_addr_t ram_size, int 
vga_ram_size,
     }
 
     /* Allocate memory space */
-    cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, 0);
+    r = qemu_ram_alloc(SDRAM_SIZE);
+    cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, r);
     /* Register peripherals */
     s = sh7750_init(env);
     irq = r2d_fpga_init(0x04000000, sh7750_irl(s));
     pci = sh_pci_register_bus(r2d_pci_set_irq, r2d_pci_map_irq, irq, 0, 4);
+    /* VGA : Just after SDRAM in memory space. Top in PCI space. */
+    r = qemu_ram_alloc(vga_ram_size);
+    pci_cirrus_vga_init(pci, ds, phys_ram_base + r, r, vga_ram_size);
 
     /* onboard CF (True IDE mode, Master only). */
     mmio_ide_init(0x14001000, 0x1400080c, irq[CF_IDE], 1,
@@ -256,5 +261,5 @@ QEMUMachine r2d_machine = {
     .name = "r2d",
     .desc = "r2d-plus board",
     .init = r2d_init,
-    .ram_require = SDRAM_SIZE | RAMSIZE_FIXED,
+    .ram_require = (SDRAM_SIZE + 8*1024*1024) | RAMSIZE_FIXED,
 };
-- 
1.5.6.3