Index: target-ppc/cpu.h
===================================================================
--- target-ppc/cpu.h	(revision 5645)
+++ target-ppc/cpu.h	(working copy)
@@ -530,8 +530,12 @@
      * during translated code execution
      */
 #if TARGET_LONG_BITS > HOST_LONG_BITS
-    target_ulong t0, t1, t2;
+    target_ulong t0, t1;
 #endif
+     /* XXX: this is a temporary workaround for i386. cf translate.c comment */
+#if (TARGET_LONG_BITS > HOST_LONG_BITS) || defined(HOST_I386)
+    target_ulong t2;
+#endif
 #if !defined(TARGET_PPC64)
     /* temporary fixed-point registers
      * used to emulate 64 bits registers on 32 bits targets
Index: target-ppc/translate.c
===================================================================
--- target-ppc/translate.c	(revision 5645)
+++ target-ppc/translate.c	(working copy)
@@ -97,8 +97,17 @@
 #else
     cpu_T[0] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG1, "T0");
     cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1");
+#ifdef HOST_I386
+    /* XXX: This is a temporary workaround for i386.
+     *      On i386 qemu_st32 runs out of registers.
+     *      The proper fix is to remove cpu_T.
+     */
+    cpu_T[2] = tcg_global_mem_new(TCG_TYPE_TL,
+                                  TCG_AREG0, offsetof(CPUState, t2), "T2");
+#else
     cpu_T[2] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG3, "T2");
 #endif
+#endif
 #if !defined(TARGET_PPC64)
     cpu_T64[0] = tcg_global_mem_new(TCG_TYPE_I64,
                                     TCG_AREG0, offsetof(CPUState, t0_64),