qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH] IBM PowerPC 4xx 32-bit PCI controller emulation


From: Hollis Blanchard
Subject: Re: [Qemu-devel] [PATCH] IBM PowerPC 4xx 32-bit PCI controller emulation
Date: Mon, 01 Dec 2008 13:17:48 -0600

Hi Blue, thanks for your comments.

On Mon, 2008-12-01 at 20:15 +0200, Blue Swirl wrote:
> On 11/26/08, Hollis Blanchard <address@hidden> wrote:
> > This PCI controller can be found on a number of 4xx SoCs, including the 
> > 440EP.
> >
> >  Signed-off-by: Hollis Blanchard <address@hidden>
> >  ---
> >  This isn't yet used by the ppc405 boards qemu emulates, but it could be if
> >  someone has a 405 firmware/kernel they're able to test with.
> 
> The device can't be tested unless it's used by some board.

I have tested the device using KVM. Since PCI support is a
self-contained patch that could be very useful to other qemu users, I
posted it first.

The problem is that none of the 405 boards emulated by qemu are
functional enough for me to run a kernel, so I can't test those.
However, Jean-Christophe Plagniol-Villard is planning to test this
(though I'm not sure how).

If you'd prefer, I can post this patch only after the PowerPC KVM
support has been merged.

> >  +#if 0
> >  +    printf("### %s: devfn %x irq %d -> %d\n", __func__,
> >  +           pci_dev->devfn, irq_num, slot+1);
> >  +#endif
> 
> You could introduce a DPRINTF macro, like for example in slavio_intctl.c.

Sure.

> >  +    /* Board IRQs 2-5 are connected to UIC IRQs 28-25 */
> >  +    /* XXX Needs some abstracting for boards other than Bamboo. */
> >  +    qemu_set_irq(pic[30-irq_num], level);
> >  +}
> 
> The IRQs should be set up at the board level and then passed to the device.

OK, I'll give that a try.

> >  +    /* XXX register_savevm() */
> 
> And register_reset?

I didn't know about that one. Looks easy enough.

I will send an updated patch once I've made these changes.

-- 
Hollis Blanchard
IBM Linux Technology Center





reply via email to

[Prev in Thread] Current Thread [Next in Thread]