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[Qemu-devel] [PATCH 42/42] target-ppc: add vsumsws, vsum2sws, and vsum4{


From: Nathan Froyd
Subject: [Qemu-devel] [PATCH 42/42] target-ppc: add vsumsws, vsum2sws, and vsum4{sbs, shs, ubs} instructions.
Date: Sun, 14 Dec 2008 18:15:15 -0800

Signed-off-by: Nathan Froyd <address@hidden>
---
 target-ppc/helper.h    |    5 ++
 target-ppc/op_helper.c |  102 ++++++++++++++++++++++++++++++++++++++++++++++++
 target-ppc/translate.c |    5 ++
 3 files changed, 112 insertions(+), 0 deletions(-)

diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 1dd2cf8..51760a1 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -217,6 +217,11 @@ DEF_HELPER_2(lvewx, void, avr, tl)
 DEF_HELPER_2(stvebx, void, avr, tl)
 DEF_HELPER_2(stvehx, void, avr, tl)
 DEF_HELPER_2(stvewx, void, avr, tl)
+DEF_HELPER_3(vsumsws, void, avr, avr, avr)
+DEF_HELPER_3(vsum2sws, void, avr, avr, avr)
+DEF_HELPER_3(vsum4sbs, void, avr, avr, avr)
+DEF_HELPER_3(vsum4shs, void, avr, avr, avr)
+DEF_HELPER_3(vsum4ubs, void, avr, avr, avr)
 
 DEF_HELPER_1(efscfsi, i32, i32)
 DEF_HELPER_1(efscfui, i32, i32)
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index 0c7473c..c9a015f 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -2710,6 +2710,108 @@ void helper_vsubcuw (ppc_avr_t *r, ppc_avr_t *a, 
ppc_avr_t *b)
   }
 }
 
+void helper_vsumsws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
+{
+  int64_t t;
+  int i, upper;
+  ppc_avr_t result;
+  int sat = 0;
+
+#if defined(WORDS_BIGENDIAN)
+  upper = N_ELEMS(s32)-1;
+#else
+  upper = 0;
+#endif
+  t = (int64_t)b->s32[upper];
+  VECTOR_FOR_I (i, s32) {
+    t += a->s32[i];
+    result.s32[i] = 0;
+  }
+  result.s32[upper] = cvtsdsw(t, &sat);
+  *r = result;
+
+  if (sat) {
+    env->vscr |= (1 << VSCR_SAT);
+  }
+}
+
+void helper_vsum2sws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
+{
+  int i, j, upper;
+  ppc_avr_t result;
+  int sat = 0;
+
+#if defined(WORDS_BIGENDIAN)
+  upper = 1;
+#else
+  upper = 0;
+#endif
+  VECTOR_FOR_I (i, u64) {
+    int64_t t = (int64_t)b->s32[upper+i*2];
+    result.u64[i] = 0;
+    VECTOR_FOR_I (j, u64) {
+      t += a->s32[2*i+j];
+    }
+    result.s32[upper+i*2] = cvtsdsw(t, &sat);
+  }
+
+  *r = result;
+  if (sat) {
+    env->vscr |= (1 << VSCR_SAT);
+  }
+}
+
+void helper_vsum4sbs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
+{
+  int i, j;
+  int sat = 0;
+
+  VECTOR_FOR_I (i, s32) {
+    int64_t t = (int64_t)b->s32[i];
+    VECTOR_FOR_I (j, s32) {
+      t += a->s8[4*i+j];
+    }
+    r->s32[i] = cvtsdsw(t, &sat);
+  }
+
+  if (sat) {
+    env->vscr |= (1 << VSCR_SAT);
+  }
+}
+
+void helper_vsum4shs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
+{
+  int sat = 0;
+
+  VECTOR_FOR (s32) {
+    int64_t t = (int64_t)b->s32[i];
+    t += a->s16[2*i] + a->s16[2*i+1];
+    r->s32[i] = cvtsdsw(t, &sat);
+  }
+
+  if (sat) {
+    env->vscr |= (1 << VSCR_SAT);
+  }
+}
+
+void helper_vsum4ubs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
+{
+  int i, j;
+  int sat = 0;
+
+  VECTOR_FOR_I (i, u32) {
+    uint64_t t = (uint64_t)b->u32[i];
+    VECTOR_FOR_I (j, u32) {
+      t += a->u8[4*i+j];
+    }
+    r->u32[i] = cvtuduw(t, &sat);
+  }
+
+  if (sat) {
+    env->vscr |= (1 << VSCR_SAT);
+  }
+}
+
 #if defined(WORDS_BIGENDIAN)
 #define UPKHI 1
 #define UPKLO 0
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index c7342a5..2cdb920 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -6349,6 +6349,11 @@ GEN_VXFORM(vpkswus, 334);
 GEN_VXFORM(vpkshss, 398);
 GEN_VXFORM(vpkswss, 462);
 GEN_VXFORM(vpkpx, 782);
+GEN_VXFORM(vsum4ubs, 1544);
+GEN_VXFORM(vsum4sbs, 1800);
+GEN_VXFORM(vsum4shs, 1608);
+GEN_VXFORM(vsum2sws, 1672);
+GEN_VXFORM(vsumsws, 1928);
 
 #define GEN_VXFORM_NOA(name, xo)                                        \
     GEN_HANDLER(name, 0x04, (xo >> 1) & 0x1f, (xo >> 6) & 0x1f, 0x001f0000, 
PPC_ALTIVEC) \
-- 
1.6.0.5





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