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Re: [Qemu-devel] MMIO address changes
From: |
Edgar E. Iglesias |
Subject: |
Re: [Qemu-devel] MMIO address changes |
Date: |
Wed, 7 Jan 2009 16:39:43 +0100 |
User-agent: |
Mutt/1.5.16 (2007-06-09) |
On Wed, Dec 03, 2008 at 01:17:45PM +0100, Edgar E. Iglesias wrote:
> On Mon, Dec 01, 2008 at 06:59:35PM +0000, Paul Brook wrote:
> > I've just committed a patch that changes the MMIO callback interface for
> > devices. Instead of being passed an absolute address these are now passed
> > an
> > offset from the start[1] of the memory region that was registered.
> >
> > By itself this change has fairly neutral benefit, it just moves logic
> > about.
> > However it makes subsequent dynamic board configuration bits nicer, and is
> > a
> > step towards a proper bus level API.
> >
> > Most of the groundwork for this is already there, from my earlier changes
> > to
> > separate ram and MMIO addresses TLB handling.
> >
> > The main notable change it that the PhysPageDesc structure is not bigger.
> > This
> > isn't ideal, however l2_phys_map needs to go away anyway, so I'm not really
> > worried about this.
> >
> > Some devices register their memory regions in multiple segments. To
> > facilitate
> > this I have added cpu_register_physical_memory_offset.
> >
> > Most of the remaining changes are fairly mechanical tweaks to fix devices
> > that
> > explicitly compensated for the absolute address. Many devices are untouched
> > because they ignore the high bits of the address.
> >
> > I've tried to be fairly thorough with the changes, and tested what I can.
> > However it's possible I missed or broke something, so please test your
> > favourite targets.
>
> FWIW the etrax-fs machine works OK although I am seeing a noticeable slow-down
> after the patch.
I tracked this down and the MMIO patch was for some reason triggering a bug
in the ETRAX models causing the slowdown. ETRAX ethernet/dma works fine
again.
Cheers
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