Re: [Qemu-devel] [PATCH] Add support for atomic operations on sh user emulation

[Lionel Landwerlin]

>From 741b3213357687005062f36885ccdffd186f627c Mon Sep 17 00:00:00 2001
From: Lionel Landwerlin <address@hidden>
Date: Thu, 15 Jan 2009 14:29:23 +0100
Subject: [PATCH] Add support for atomic operation on sh user emulation

On SH uniprocessor architectures there are no atomic instructions
(except tas.b) so emulation of atomic operations is done by the kernel
(gUSA). It's done by convention, on sh4 the register r15 is positioned
to a negative value N, telling the kernel to not prempt the current
task until its pc register hasn't growth of N.

This patch solve the problem of user emulation by taking a global
(inter thread) lock each time the r15 register is positioned to a
negative value and releasing it when r15 leaves the negative value.
Tas.b instruction must also take the lock because it's the only one
(afaik) atomic instruction.

Signed-off-by: Lionel Landwerlin <address@hidden>
---
 linux-user/main.c      |    4 ++++
 target-sh4/helper.h    |    5 +++++
 target-sh4/op_helper.c |   21 +++++++++++++++++++++
 target-sh4/translate.c |   23 ++++++++++++++++++++---
 4 files changed, 50 insertions(+), 3 deletions(-)

diff --git a/linux-user/main.c b/linux-user/main.c
index 7ceea08..0178603 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -31,6 +31,7 @@
 #include "syscall_hook.h"
 /* For tb_lock */
 #include "exec-all.h"
+#include "helper.h"
 
 #define DEBUG_LOGFILE "/tmp/qemu.log"
 
@@ -1902,12 +1903,14 @@ void cpu_loop (CPUState *env)
             env->gregs[0] = ret;
             break;
         case EXCP_INTERRUPT:
+            helper_exit_critical_region();
             /* just indicate that signals should be handled asap */
             break;
         case EXCP_DEBUG:
             {
                 int sig;
 
+                helper_exit_critical_region();
                 sig = gdb_handlesig (env, TARGET_SIGTRAP);
                 if (sig)
                   {
@@ -1920,6 +1923,7 @@ void cpu_loop (CPUState *env)
             break;
        case 0xa0:
        case 0xc0:
+            helper_exit_critical_region();
             info.si_signo = SIGSEGV;
             info.si_errno = 0;
             info.si_code = TARGET_SEGV_MAPERR;
diff --git a/target-sh4/helper.h b/target-sh4/helper.h
index e665185..f35aabd 100644
--- a/target-sh4/helper.h
+++ b/target-sh4/helper.h
@@ -46,4 +46,9 @@ DEF_HELPER_1(fsqrt_DT, i64, i64)
 DEF_HELPER_1(ftrc_FT, i32, i32)
 DEF_HELPER_1(ftrc_DT, i32, i64)
 
+#ifdef CONFIG_USER_ONLY
+DEF_HELPER_0(enter_critical_region, void)
+DEF_HELPER_0(exit_critical_region, void)
+#endif
+
 #include "def-helper.h"
diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
index ead14e3..827b37b 100644
--- a/target-sh4/op_helper.c
+++ b/target-sh4/op_helper.c
@@ -20,6 +20,7 @@
 #include <assert.h>
 #include "exec.h"
 #include "helper.h"
+#include "qemu.h"
 
 #ifndef CONFIG_USER_ONLY
 
@@ -615,3 +616,23 @@ uint32_t helper_ftrc_DT(uint64_t t0)
     d.ll = t0;
     return float64_to_int32_round_to_zero(d.d, &env->fp_status);
 }
+
+#ifdef CONFIG_USER_ONLY
+static spinlock_t global_threads_lock = SPIN_LOCK_UNLOCKED;
+static CPUState *cpu_locking_threads = NULL;
+
+void helper_enter_critical_region(void)
+{
+    spin_lock(&global_threads_lock);
+    cpu_locking_threads = thread_env;
+}
+
+void helper_exit_critical_region(void)
+{
+    if (cpu_locking_threads == thread_env)
+    {
+        cpu_locking_threads = NULL;
+        spin_unlock(&global_threads_lock);
+    }
+}
+#endif /* CONFIG_USER_ONLY */
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index bce7463..23761d5 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -564,7 +564,12 @@ static void _decode_opc(DisasContext * ctx)
        }
        return;
     case 0xe000:               /* mov #imm,Rn */
-       tcg_gen_movi_i32(REG(B11_8), B7_0s);
+#ifdef CONFIG_USER_ONLY
+        /* Handle critical region (gUSA for sh4) */
+        if ((REG(B11_8) == 16) && ((signed char) B7_0s < 0))
+            gen_helper_enter_critical_region();
+#endif
+        tcg_gen_movi_i32(REG(B11_8), B7_0s);
        return;
     case 0x9000:               /* mov.w @(disp,PC),Rn */
        {
@@ -600,7 +605,12 @@ static void _decode_opc(DisasContext * ctx)
 
     switch (ctx->opcode & 0xf00f) {
     case 0x6003:               /* mov Rm,Rn */
-       tcg_gen_mov_i32(REG(B11_8), REG(B7_4));
+        tcg_gen_mov_i32(REG(B11_8), REG(B7_4));
+#ifdef CONFIG_USER_ONLY
+        /* Handle critical region (gUSA for sh4) */
+        if (REG(B11_8) == 16)
+            gen_helper_exit_critical_region();
+#endif
        return;
     case 0x2000:               /* mov.b Rm,@Rn */
        tcg_gen_qemu_st8(REG(B7_4), REG(B11_8), ctx->memidx);
@@ -1656,7 +1666,11 @@ static void _decode_opc(DisasContext * ctx)
     case 0x401b:               /* tas.b @Rn */
        {
            TCGv addr, val;
-           addr = tcg_temp_local_new();
+
+#ifdef CONFIG_USER_ONLY
+            gen_helper_enter_critical_region();
+#endif
+            addr = tcg_temp_local_new();
            tcg_gen_mov_i32(addr, REG(B11_8));
            val = tcg_temp_local_new();
            tcg_gen_qemu_ld8u(val, addr, ctx->memidx);
@@ -1665,6 +1679,9 @@ static void _decode_opc(DisasContext * ctx)
            tcg_gen_qemu_st8(val, addr, ctx->memidx);
            tcg_temp_free(val);
            tcg_temp_free(addr);
+#ifdef CONFIG_USER_ONLY
+            gen_helper_exit_critical_region();
+#endif
        }
        return;
     case 0xf00d: /* fsts FPUL,FRn - FPSCR: Nothing */
-- 
1.5.6.5