Re: [Qemu-devel] [PATCH 3/7] arm: Fix gic_irq_state.level bitfield type

[Aurelien Jarno]

On Sat, Feb 21, 2009 at 08:00:55PM +0100, Jan Kiszka wrote:
> Found while cleaning up compiler warnings: GIC_*_LEVEL macros strongly
> suggest that gic_irq_state.level is intended to be per-CPU and not just
> a single, global bit. I'm unable to test the effect, but it seems to be
> the most reasonable fix for the apparent brokenness.
> 
> Signed-off-by: Jan Kiszka <address@hidden>

Thanks applied.

> ---
> 
>  hw/arm_gic.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/hw/arm_gic.c b/hw/arm_gic.c
> index fef3113..8e61b6e 100644
> --- a/hw/arm_gic.c
> +++ b/hw/arm_gic.c
> @@ -39,7 +39,7 @@ typedef struct gic_irq_state
>      unsigned enabled:1;
>      unsigned pending:NCPU;
>      unsigned active:NCPU;
> -    unsigned level:1;
> +    unsigned level:NCPU;
>      unsigned model:1; /* 0 = N:N, 1 = 1:N */
>      unsigned trigger:1; /* nonzero = edge triggered.  */
>  } gic_irq_state;
> 
> 
> 
> 

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net