diff --git a/bios/BIOS-bochs-latest b/bios/BIOS-bochs-latest
index 6ce9d22..27f0256 100644
Binary files a/bios/BIOS-bochs-latest and b/bios/BIOS-bochs-latest differ
diff --git a/bios/BIOS-bochs-legacy b/bios/BIOS-bochs-legacy
index 656c28d..e31c279 100644
Binary files a/bios/BIOS-bochs-legacy and b/bios/BIOS-bochs-legacy differ
diff --git a/bios/rombios.c b/bios/rombios.c
index 0f13b53..b04426c 100644
--- a/bios/rombios.c
+++ b/bios/rombios.c
@@ -151,7 +151,7 @@
 #define BX_MAX_ATA_DEVICES      (BX_MAX_ATA_INTERFACES*2)
 
 #define BX_VIRTUAL_PORTS 1 /* normal output to Bochs ports */
-#define BX_DEBUG_SERIAL  0 /* output to COM1 */
+#define BX_DEBUG_SERIAL  1 /* output to COM1 */
 
    /* model byte 0xFC = AT */
 #define SYS_MODEL_ID     0xFC
@@ -202,7 +202,7 @@
 // define this if you want to make PCIBIOS working on a specific bridge only
 // undef enables PCIBIOS when at least one PCI device is found
 // i440FX is emulated by Bochs and QEMU
-#define PCI_FIXED_HOST_BRIDGE 0x12378086 ;; i440FX PCI bridge
+#define PCI_FIXED_HOST_BRIDGE 0x71908086 ;; i440FX PCI bridge
 
 // #20  is dec 20
 // #$20 is hex 20 = 32
@@ -9688,17 +9688,17 @@ pci_routing_table_structure:
   db 0, 1 ;; version
   dw 32 + (6 * 16) ;; table size
   db 0 ;; PCI interrupt router bus
-  db 0x08 ;; PCI interrupt router DevFunc
+  db 0x38 ;; PCI interrupt router DevFunc
   dw 0x0000 ;; PCI exclusive IRQs
   dw 0x8086 ;; compatible PCI interrupt router vendor ID
-  dw 0x122e ;; compatible PCI interrupt router device ID
+  dw 0x7000 ;; compatible PCI interrupt router device ID
   dw 0,0 ;; Miniport data
   db 0,0,0,0,0,0,0,0,0,0,0 ;; reserved
-  db 0x37 ;; checksum
+  db 0xA7 ;; checksum
 pci_routing_table_structure_start:
   ;; first slot entry PCI-to-ISA (embedded)
   db 0 ;; pci bus number
-  db 0x08 ;; pci device number (bit 7-3)
+  db 0x38 ;; pci device number (bit 7-3)
   db 0x60 ;; link value INTA#: pointer into PCI2ISA config space
   dw 0xdef8 ;; IRQ bitmap INTA#
   db 0x61 ;; link value INTB#
diff --git a/bios/rombios.h b/bios/rombios.h
index 6f9cbb1..649f228 100644
--- a/bios/rombios.h
+++ b/bios/rombios.h
@@ -26,7 +26,7 @@
 #else
 #  define BX_ROMBIOS32     0
 #endif
-#define DEBUG_ROMBIOS    0
+#define DEBUG_ROMBIOS    1
 
 #define PANIC_PORT  0x400
 #define PANIC_PORT2 0x401
diff --git a/bios/rombios32.c b/bios/rombios32.c
index 7be4216..2bd902b 100644
--- a/bios/rombios32.c
+++ b/bios/rombios32.c
@@ -682,6 +682,7 @@ void smp_probe(void)
 
 #define PCI_VENDOR_ID_INTEL             0x8086
 #define PCI_DEVICE_ID_INTEL_82441       0x1237
+#define PCI_DEVICE_ID_INTEL_82443       0x7190
 #define PCI_DEVICE_ID_INTEL_82371SB_0   0x7000
 #define PCI_DEVICE_ID_INTEL_82371SB_1   0x7010
 #define PCI_DEVICE_ID_INTEL_82371AB_0   0x7110
@@ -850,7 +851,7 @@ static void pci_bios_init_bridges(PCIDevice *d)
         outb(0x4d1, elcr[1]);
         BX_INFO("PIIX3/PIIX4 init: elcr=%02x %02x\n",
                 elcr[0], elcr[1]);
-    } else if (vendor_id == PCI_VENDOR_ID_INTEL && device_id == PCI_DEVICE_ID_INTEL_82441) {
+    } else if (vendor_id == PCI_VENDOR_ID_INTEL && (device_id == PCI_DEVICE_ID_INTEL_82441 || device_id == PCI_DEVICE_ID_INTEL_82443)) {
         /* i440 PCI bridge */
         bios_shadow_init(d);
     }