[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 07/17] m68k: add DBcc instruction.
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH 07/17] m68k: add DBcc instruction. |
Date: |
Sat, 30 May 2009 00:41:51 +0200 |
Define DBcc instruction and attach it to M68000 feature.
Signed-off-by: Andreas Schwab <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/translate.c | 26 ++++++++++++++++++++++++++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index d08e1c8..f2a0c92 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -923,6 +923,31 @@ DISAS_INSN(scc_mem)
tcg_temp_free(dest);
}
+DISAS_INSN(dbcc)
+{
+ int l1;
+ TCGv reg;
+ TCGv tmp;
+ int16_t offset;
+ uint32_t base;
+
+ reg = DREG(insn, 0);
+ base = s->pc;
+ offset = ldsw_code(s->pc);
+ s->pc += 2;
+ l1 = gen_new_label();
+ gen_jmpcc(s, (insn >> 8) & 0xf, l1);
+
+ tmp = tcg_temp_new();
+ tcg_gen_ext16s_i32(tmp, reg);
+ tcg_gen_addi_i32(tmp, tmp, -1);
+ gen_partset_reg(OS_WORD, reg, tmp);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1);
+ gen_jmp_tb(s, 1, base + offset);
+ gen_set_label(l1);
+ gen_jmp_tb(s, 0, s->pc);
+}
+
DISAS_INSN(undef_mac)
{
gen_exception(s, s->pc - 2, EXCP_LINEA);
@@ -2994,6 +3019,7 @@ void register_m68k_insns (CPUM68KState *env)
INSN(scc, 50c0, f0f8, CF_ISA_A);
INSN(scc_mem, 50c0, f0c0, M68000);
INSN(scc, 50c0, f0f8, M68000);
+ INSN(dbcc, 50c8, f0f8, M68000);
INSN(tpf, 51f8, fff8, CF_ISA_A);
/* Branch instructions. */
--
1.5.6.5
- [Qemu-devel] [PATCH 00/17] m68k: add partial Motorola 680x0 support, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 01/17] m68k: Replace gen_im32() by tcg_const_i32(), Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 02/17] m68k: add tcg_gen_debug_insn_start(), Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 03/17] m68k: define m680x0 CPUs and features, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 04/17] m68k: add missing accessing modes for some instructions., Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 05/17] m68k: add Motorola 680x0 family common instructions., Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 06/17] m68k: add Scc instruction with memory operand., Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 07/17] m68k: add DBcc instruction.,
Laurent Vivier <=
- [Qemu-devel] [PATCH 08/17] m68k: modify movem instruction to manage word, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 09/17] m68k: add 64bit divide., Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 10/17] m68k: add 32bit and 64bit multiply, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 11/17] m68k: add word data size for suba/adda, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 12/17] m68k: add fpu, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 13/17] m68k: add "byte", "word" and memory shift, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 14/17] m68k: add "byte", "word" and memory rotate., Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 15/17] m68k: add bitfield_mem, bitfield_reg, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 16/17] m68k: add variable offset/width to bitfield_reg/bitfield_mem, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 17/17] m68k: add cas, Laurent Vivier, 2009/05/29