[Qemu-devel] Re: [PATCH 1/3] m68k: allow fpu to manage double single data type.

[Andreas Schwab]

Laurent Vivier <address@hidden> writes:

> +            if ((insn & 7) == 4) {
> +                src = gen_load64(s, tcg_const_i32(s->pc));
> +                s->pc += 8;

This is wrong, it doesn't check that this is indeed a 7.4 addressing
mode, but will match any other mode with register 4.

> +                case 7:
> +                    offset = ldsw_code(s->pc);
> +                    offset += s->pc - 2;
> +                    s->pc += 2;
> +                    tcg_gen_addi_i32(tmp32, tmp32, offset);
> +                    break;

Btw, this is still broken, pc-rel addressing surely does not want the
contents of register a2 added in (and the 68k supports all the indexed
modes as well).  All non-immediate addresses should probably be handled
by gen_lea.

Andreas.

-- 
Andreas Schwab, address@hidden
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