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[Qemu-devel] [PATCH 2/3] lsi53c895a: Implement read and write access to


From: Sebastian Herbszt
Subject: [Qemu-devel] [PATCH 2/3] lsi53c895a: Implement read and write access to DMA Next Address
Date: Sat, 13 Jun 2009 23:03:27 +0200

Fixes the following errors:

lsi_scsi: error: Unhandled writeb 0x28 = 0x0
lsi_scsi: error: Unhandled writeb 0x29 = 0x0
lsi_scsi: error: Unhandled writeb 0x2a = 0x0
lsi_scsi: error: Unhandled writeb 0x2b = 0x0

Signed-off-by: Sebastian Herbszt <address@hidden>

Index: qemu-3a2eeac0c9033e30b19d88465c9561f982e9e6d0/hw/lsi53c895a.c
===================================================================
--- qemu-3a2eeac0c9033e30b19d88465c9561f982e9e6d0.orig/hw/lsi53c895a.c
+++ qemu-3a2eeac0c9033e30b19d88465c9561f982e9e6d0/hw/lsi53c895a.c
@@ -1403,6 +1403,7 @@ static uint8_t lsi_reg_readb(LSIState *s
     CASE_GET_REG24(dbc, 0x24)
     case 0x27: /* DCMD */
         return s->dcmd;
+    CASE_GET_REG32(dnad, 0x28)
     CASE_GET_REG32(dsp, 0x2c)
     CASE_GET_REG32(dsps, 0x30)
     CASE_GET_REG32(scratch[0], 0x34)
@@ -1595,6 +1596,7 @@ static void lsi_reg_writeb(LSIState *s, 
         }
         s->ctest5 = val;
         break;
+    CASE_SET_REG32(dnad, 0x28)
     case 0x2c: /* DSP[0:7] */
         s->dsp &= 0xffffff00;
         s->dsp |= val;





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