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Re: [Qemu-devel] [PATCH] sparc64: trap handling corrections
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] [PATCH] sparc64: trap handling corrections |
Date: |
Sun, 12 Jul 2009 11:53:45 +0300 |
On 7/12/09, Igor Kovalenko <address@hidden> wrote:
> On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<address@hidden> wrote:
> > On 7/12/09, Igor Kovalenko <address@hidden> wrote:
> >> Good trap handling is required to process interrupts.
> >> This patch fixes the following:
> >>
> >> - sparc64 has no wim register
> >> - sparc64 has no psret register, use IE bit of pstate
> >> extract IE checking code to cpu_interrupts_enabled
> >> - alternate globals are not available if cpu has GL feature
> >> in this case bit AG of pstate is constant zero
> >> - write to pstate must actually write pstate
> >> even if cpu has GL feature
> >>
> >> Also timer interrupt is handled using do_interrupt.
> >
> > A bit too much for one patch. Please also remove the code instead of
> > commenting out.
>
>
> I now excluded timer interrupt related part.
> To my mind other changes are essentially tied together.
>
>
> > PUT_PSR for Sparc64 needs CC_OP = CC_OP_FLAGS; like Sparc32.
>
>
> Fixed, please find attached the updated version.
Thanks, applied.