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[Qemu-devel] [PATCH 4/9] pci: use uint64_t for bar addr and size instead
|
From: |
Isaku Yamahata |
|
Subject: |
[Qemu-devel] [PATCH 4/9] pci: use uint64_t for bar addr and size instead of uint32_t. |
|
Date: |
Wed, 15 Jul 2009 20:15:04 +0900 |
This patch is preliminary for 64bit bar.
For 64bit bar support, replace uint32_t with uint64_t for addr/size
to be able to represent 64bit width.
Signed-off-by: Isaku Yamahata <address@hidden>
---
hw/ac97.c | 2 +-
hw/cirrus_vga.c | 4 ++--
hw/e1000.c | 12 +++++++-----
hw/eepro100.c | 8 ++++----
hw/es1370.c | 2 +-
hw/ide.c | 4 ++--
hw/lsi53c895a.c | 6 +++---
hw/macio.c | 2 +-
hw/msix.c | 2 +-
hw/msix.h | 2 +-
hw/ne2000.c | 2 +-
hw/openpic.c | 2 +-
hw/pci.c | 24 +++++++++++++++---------
hw/pci.h | 10 +++++-----
hw/pcnet.c | 9 +++++----
hw/rtl8139.c | 4 ++--
hw/sun4u.c | 2 +-
hw/usb-ohci.c | 2 +-
hw/usb-uhci.c | 2 +-
hw/vga.c | 2 +-
hw/virtio-pci.c | 2 +-
hw/vmware_vga.c | 4 ++--
hw/wdt_i6300esb.c | 5 +++--
23 files changed, 62 insertions(+), 52 deletions(-)
diff --git a/hw/ac97.c b/hw/ac97.c
index f18fa52..faf7444 100644
--- a/hw/ac97.c
+++ b/hw/ac97.c
@@ -1267,7 +1267,7 @@ static int ac97_load (QEMUFile *f, void *opaque, int
version_id)
}
static void ac97_map (PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCIAC97LinkState *d = (PCIAC97LinkState *) pci_dev;
AC97LinkState *s = &d->ac97;
diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index 88868b9..afb8a2b 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -3260,7 +3260,7 @@ void isa_cirrus_vga_init(void)
***************************************/
static void cirrus_pci_lfb_map(PCIDevice *d, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
CirrusVGAState *s = &((PCICirrusVGAState *)d)->cirrus_vga;
@@ -3281,7 +3281,7 @@ static void cirrus_pci_lfb_map(PCIDevice *d, int
region_num,
}
static void cirrus_pci_mmio_map(PCIDevice *d, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
CirrusVGAState *s = &((PCICirrusVGAState *)d)->cirrus_vga;
diff --git a/hw/e1000.c b/hw/e1000.c
index 4ac8918..149da98 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -143,10 +143,11 @@ static const char phy_regcap[0x20] = {
};
static void
-ioport_map(PCIDevice *pci_dev, int region_num, uint32_t addr,
- uint32_t size, int type)
+ioport_map(PCIDevice *pci_dev, int region_num, uint64_t addr,
+ uint64_t size, int type)
{
- DBGOUT(IO, "e1000_ioport_map addr=0x%04x size=0x%08x\n", addr, size);
+ DBGOUT(IO, "e1000_ioport_map addr=0x%04"PRIx64" size=0x%08"PRIx64"\n",
+ addr, size);
}
static void
@@ -1021,7 +1022,7 @@ static CPUReadMemoryFunc *e1000_mmio_read[] = {
static void
e1000_mmio_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
E1000State *d = (E1000State *)pci_dev;
int i;
@@ -1031,7 +1032,8 @@ e1000_mmio_map(PCIDevice *pci_dev, int region_num,
};
- DBGOUT(MMIO, "e1000_mmio_map addr=0x%08x 0x%08x\n", addr, size);
+ DBGOUT(MMIO, "e1000_mmio_map addr=0x%08"PRIx64" 0x%08"PRIx64"\n",
+ addr, size);
cpu_register_physical_memory(addr, PNPMMIO_SIZE, d->mmio_index);
qemu_register_coalesced_mmio(addr, excluded_regs[0]);
diff --git a/hw/eepro100.c b/hw/eepro100.c
index 85446ed..795acab 100644
--- a/hw/eepro100.c
+++ b/hw/eepro100.c
@@ -1345,12 +1345,12 @@ typedef struct PCIEEPRO100State {
} PCIEEPRO100State;
static void pci_map(PCIDevice * pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCIEEPRO100State *d = (PCIEEPRO100State *) pci_dev;
EEPRO100State *s = &d->eepro100;
- logout("region %d, addr=0x%08x, size=0x%08x, type=%d\n",
+ logout("region %d, addr=0x%08"PRIx64", size=0x%08"PRIx64", type=%d\n",
region_num, addr, size, type);
assert(region_num == 1);
@@ -1419,11 +1419,11 @@ static CPUReadMemoryFunc *pci_mmio_read[] = {
};
static void pci_mmio_map(PCIDevice * pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCIEEPRO100State *d = (PCIEEPRO100State *) pci_dev;
- logout("region %d, addr=0x%08x, size=0x%08x, type=%d\n",
+ logout("region %d, addr=0x%08"PRIx64", size=0x%08"PRIx64", type=%d\n",
region_num, addr, size, type);
if (region_num == 0) {
diff --git a/hw/es1370.c b/hw/es1370.c
index 5c9af0e..6a3f3a6 100644
--- a/hw/es1370.c
+++ b/hw/es1370.c
@@ -913,7 +913,7 @@ static void es1370_adc_callback (void *opaque, int avail)
}
static void es1370_map (PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCIES1370State *d = (PCIES1370State *) pci_dev;
ES1370State *s = &d->es1370;
diff --git a/hw/ide.c b/hw/ide.c
index 1e56786..d2f801a 100644
--- a/hw/ide.c
+++ b/hw/ide.c
@@ -2921,7 +2921,7 @@ void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
static void cmd646_update_irq(PCIIDEState *d);
static void ide_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCIIDEState *d = (PCIIDEState *)pci_dev;
IDEState *ide_state;
@@ -3152,7 +3152,7 @@ static void bmdma_addr_writel(void *opaque, uint32_t
addr, uint32_t val)
}
static void bmdma_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCIIDEState *d = (PCIIDEState *)pci_dev;
int i;
diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c
index 516a468..d9ebe6e 100644
--- a/hw/lsi53c895a.c
+++ b/hw/lsi53c895a.c
@@ -1923,7 +1923,7 @@ static void lsi_io_writel(void *opaque, uint32_t addr,
uint32_t val)
}
static void lsi_io_mapfunc(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
LSIState *s = (LSIState *)pci_dev;
@@ -1938,7 +1938,7 @@ static void lsi_io_mapfunc(PCIDevice *pci_dev, int
region_num,
}
static void lsi_ram_mapfunc(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
LSIState *s = (LSIState *)pci_dev;
@@ -1948,7 +1948,7 @@ static void lsi_ram_mapfunc(PCIDevice *pci_dev, int
region_num,
}
static void lsi_mmio_mapfunc(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
LSIState *s = (LSIState *)pci_dev;
diff --git a/hw/macio.c b/hw/macio.c
index 8cfadfc..41412c3 100644
--- a/hw/macio.c
+++ b/hw/macio.c
@@ -40,7 +40,7 @@ struct macio_state_t {
};
static void macio_map (PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
macio_state_t *macio_state;
int i;
diff --git a/hw/msix.c b/hw/msix.c
index 3420ce9..6e7cd7b 100644
--- a/hw/msix.c
+++ b/hw/msix.c
@@ -204,7 +204,7 @@ static CPUReadMemoryFunc *msix_mmio_read[] = {
/* Should be called from device's map method. */
void msix_mmio_map(PCIDevice *d, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
uint8_t *config = d->config + d->msix_cap;
uint32_t table = pci_get_long(config + MSIX_TABLE_OFFSET);
diff --git a/hw/msix.h b/hw/msix.h
index 3427778..99f1647 100644
--- a/hw/msix.h
+++ b/hw/msix.h
@@ -10,7 +10,7 @@ void msix_write_config(PCIDevice *pci_dev, uint32_t address,
uint32_t val, int len);
void msix_mmio_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type);
+ uint64_t addr, uint64_t size, int type);
int msix_uninit(PCIDevice *d);
diff --git a/hw/ne2000.c b/hw/ne2000.c
index b9c018a..726d98a 100644
--- a/hw/ne2000.c
+++ b/hw/ne2000.c
@@ -777,7 +777,7 @@ typedef struct PCINE2000State {
} PCINE2000State;
static void ne2000_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCINE2000State *d = (PCINE2000State *)pci_dev;
NE2000State *s = &d->ne2000;
diff --git a/hw/openpic.c b/hw/openpic.c
index baa7ecc..276377e 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -1026,7 +1026,7 @@ static CPUReadMemoryFunc *openpic_read[] = {
};
static void openpic_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
openpic_t *opp;
diff --git a/hw/pci.c b/hw/pci.c
index 03241d4..2d985f0 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -399,19 +399,19 @@ int pci_unregister_device(PCIDevice *pci_dev)
}
void pci_register_bar(PCIDevice *pci_dev, int region_num,
- uint32_t size, int type,
+ uint64_t size, int type,
PCIMapIORegionFunc *map_func)
{
PCIIORegion *r;
uint32_t addr;
- uint32_t wmask;
+ uint64_t wmask;
if ((unsigned int)region_num >= PCI_NUM_REGIONS)
return;
if (size & (size-1)) {
fprintf(stderr, "ERROR: PCI region size must be pow2 "
- "type=0x%x, size=0x%x\n", type, size);
+ "type=0x%x, size=0x%"PRIx64"\n", type, size);
exit(1);
}
@@ -430,7 +430,7 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num,
addr = 0x10 + region_num * 4;
}
*(uint32_t *)(pci_dev->config + addr) = cpu_to_le32(type);
- *(uint32_t *)(pci_dev->wmask + addr) = cpu_to_le32(wmask);
+ *(uint32_t *)(pci_dev->wmask + addr) = cpu_to_le32(wmask & 0xffffffff);
*(uint32_t *)(pci_dev->cmask + addr) = 0xffffffff;
}
@@ -438,7 +438,8 @@ static void pci_update_mappings(PCIDevice *d)
{
PCIIORegion *r;
int cmd, i;
- uint32_t last_addr, new_addr, config_ofs;
+ uint64_t last_addr, new_addr;
+ uint32_t config_ofs;
cmd = le16_to_cpu(*(uint16_t *)(d->config + PCI_COMMAND));
for(i = 0; i < PCI_NUM_REGIONS; i++) {
@@ -477,7 +478,11 @@ static void pci_update_mappings(PCIDevice *d)
mappings, we handle specific values as invalid
mappings. */
if (last_addr <= new_addr || new_addr == 0 ||
- last_addr == PCI_BAR_UNMAPPED) {
+ last_addr == PCI_BAR_UNMAPPED ||
+
+ /* keep old behaviour
+ * without this, PC ide doesn't work well. */
+ last_addr >= UINT32_MAX) {
new_addr = PCI_BAR_UNMAPPED;
}
} else {
@@ -733,10 +738,10 @@ static void pci_info_device(PCIDevice *d)
if (r->size != 0) {
monitor_printf(mon, " BAR%d: ", i);
if (r->type & PCI_ADDRESS_SPACE_IO) {
- monitor_printf(mon, "I/O at 0x%04x [0x%04x].\n",
+ monitor_printf(mon, "I/O at 0x%04"PRIx64" [0x%04"PRIx64"].\n",
r->addr, r->addr + r->size - 1);
} else {
- monitor_printf(mon, "32 bit memory at 0x%08x [0x%08x].\n",
+ monitor_printf(mon, "32 bit memory at 0x%08"PRIx64"
[0x%08"PRIx64"].\n",
r->addr, r->addr + r->size - 1);
}
}
@@ -1044,7 +1049,8 @@ static void pcibus_dev_print(Monitor *mon, DeviceState
*dev, int indent)
r = &d->io_regions[i];
if (!r->size)
continue;
- monitor_printf(mon, "%*sbar %d: %s at 0x%x [0x%x]\n", indent, "",
+ monitor_printf(mon, "%*sbar %d: %s at 0x%"PRIx64" [0x%"PRIx64"]\n",
+ indent, "",
i, r->type & PCI_ADDRESS_SPACE_IO ? "i/o" : "mem",
r->addr, r->addr + r->size - 1);
}
diff --git a/hw/pci.h b/hw/pci.h
index 9d60c36..fee9ed6 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -75,7 +75,7 @@ typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
uint32_t address, int len);
typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type);
+ uint64_t addr, uint64_t size, int type);
typedef int PCIUnregisterFunc(PCIDevice *pci_dev);
#define PCI_ADDRESS_SPACE_MEM 0x00
@@ -83,9 +83,9 @@ typedef int PCIUnregisterFunc(PCIDevice *pci_dev);
#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
typedef struct PCIIORegion {
- uint32_t addr; /* current PCI mapping address. -1 means not mapped */
-#define PCI_BAR_UNMAPPED (~(uint32_t)0)
- uint32_t size;
+ uint64_t addr; /* current PCI mapping address. -1 means not mapped */
+#define PCI_BAR_UNMAPPED (~(uint64_t)0)
+ uint64_t size;
uint8_t type;
PCIMapIORegionFunc *map_func;
} PCIIORegion;
@@ -219,7 +219,7 @@ PCIDevice *pci_register_device(PCIBus *bus, const char
*name,
int pci_unregister_device(PCIDevice *pci_dev);
void pci_register_bar(PCIDevice *pci_dev, int region_num,
- uint32_t size, int type,
+ uint64_t size, int type,
PCIMapIORegionFunc *map_func);
int pci_add_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size);
diff --git a/hw/pcnet.c b/hw/pcnet.c
index 22ab6be..e039d9f 100644
--- a/hw/pcnet.c
+++ b/hw/pcnet.c
@@ -1762,12 +1762,13 @@ static uint32_t pcnet_ioport_readl(void *opaque,
uint32_t addr)
}
static void pcnet_ioport_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCNetState *d = &((PCIPCNetState *)pci_dev)->state;
#ifdef PCNET_DEBUG_IO
- printf("pcnet_ioport_map addr=0x%04x size=0x%04x\n", addr, size);
+ printf("pcnet_ioport_map addr=0x%04"PRIx64" size=0x%04"PRIx64"\n",
+ addr, size);
#endif
register_ioport_write(addr, 16, 1, pcnet_aprom_writeb, d);
@@ -1976,12 +1977,12 @@ static CPUReadMemoryFunc *pcnet_mmio_read[] = {
};
static void pcnet_mmio_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCIPCNetState *d = (PCIPCNetState *)pci_dev;
#ifdef PCNET_DEBUG_IO
- printf("pcnet_mmio_map addr=0x%08x 0x%08x\n", addr, size);
+ printf("pcnet_mmio_map addr=0x%08"PRIx64" 0x%08"PRIx64"\n", addr, size);
#endif
cpu_register_physical_memory(addr, PCNET_PNPMMIO_SIZE,
d->state.mmio_index);
diff --git a/hw/rtl8139.c b/hw/rtl8139.c
index 91165db..6b8461c 100644
--- a/hw/rtl8139.c
+++ b/hw/rtl8139.c
@@ -3329,7 +3329,7 @@ typedef struct PCIRTL8139State {
} PCIRTL8139State;
static void rtl8139_mmio_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCIRTL8139State *d = (PCIRTL8139State *)pci_dev;
RTL8139State *s = &d->rtl8139;
@@ -3338,7 +3338,7 @@ static void rtl8139_mmio_map(PCIDevice *pci_dev, int
region_num,
}
static void rtl8139_ioport_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCIRTL8139State *d = (PCIRTL8139State *)pci_dev;
RTL8139State *s = &d->rtl8139;
diff --git a/hw/sun4u.c b/hw/sun4u.c
index e08ae23..eb7737f 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -288,7 +288,7 @@ static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7,
7 };
static fdctrl_t *floppy_controller;
static void ebus_mmio_mapfunc(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
DPRINTF("Mapping region %d registers at %08x\n", region_num, addr);
switch (region_num) {
diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c
index 83d1a5c..f94f57a 100644
--- a/hw/usb-ohci.c
+++ b/hw/usb-ohci.c
@@ -1705,7 +1705,7 @@ typedef struct {
} OHCIPCIState;
static void ohci_mapfunc(PCIDevice *pci_dev, int i,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
OHCIPCIState *ohci = (OHCIPCIState *)pci_dev;
cpu_register_physical_memory(addr, size, ohci->state.mem);
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 7b74207..5ffe612 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -1058,7 +1058,7 @@ static void uhci_frame_timer(void *opaque)
}
static void uhci_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
UHCIState *s = (UHCIState *)pci_dev;
diff --git a/hw/vga.c b/hw/vga.c
index e1a470d..6e0d61a 100644
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -2236,7 +2236,7 @@ void vga_dirty_log_start(VGAState *s)
}
static void vga_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
PCIVGAState *d = (PCIVGAState *)pci_dev;
VGAState *s = &d->vga_state;
diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c
index d605b5f..f2fe42e 100644
--- a/hw/virtio-pci.c
+++ b/hw/virtio-pci.c
@@ -344,7 +344,7 @@ static void virtio_pci_config_writel(void *opaque, uint32_t
addr, uint32_t val)
}
static void virtio_map(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
VirtIODevice *vdev = proxy->vdev;
diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c
index 5ceebf1..97248a7 100644
--- a/hw/vmware_vga.c
+++ b/hw/vmware_vga.c
@@ -1173,7 +1173,7 @@ static int pci_vmsvga_load(QEMUFile *f, void *opaque, int
version_id)
}
static void pci_vmsvga_map_ioport(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
struct pci_vmsvga_state_s *d = (struct pci_vmsvga_state_s *) pci_dev;
struct vmsvga_state_s *s = &d->chip;
@@ -1193,7 +1193,7 @@ static void pci_vmsvga_map_ioport(PCIDevice *pci_dev, int
region_num,
}
static void pci_vmsvga_map_mem(PCIDevice *pci_dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
struct pci_vmsvga_state_s *d = (struct pci_vmsvga_state_s *) pci_dev;
struct vmsvga_state_s *s = &d->chip;
diff --git a/hw/wdt_i6300esb.c b/hw/wdt_i6300esb.c
index 42642c7..678eb17 100644
--- a/hw/wdt_i6300esb.c
+++ b/hw/wdt_i6300esb.c
@@ -351,7 +351,7 @@ static void i6300esb_mem_writel(void *vp,
target_phys_addr_t addr, uint32_t val)
}
static void i6300esb_map(PCIDevice *dev, int region_num,
- uint32_t addr, uint32_t size, int type)
+ uint64_t addr, uint64_t size, int type)
{
static CPUReadMemoryFunc *mem_read[3] = {
i6300esb_mem_readb,
@@ -366,7 +366,8 @@ static void i6300esb_map(PCIDevice *dev, int region_num,
I6300State *d = (I6300State *) dev;
int io_mem;
- i6300esb_debug("addr = %x, size = %x, type = %d\n", addr, size, type);
+ i6300esb_debug("addr = %"PRIx64", size = %"PRIx64", type = %d\n",
+ addr, size, type);
io_mem = cpu_register_io_memory(mem_read, mem_write, d);
cpu_register_physical_memory (addr, 0x10, io_mem);
--
1.6.0.2
- [Qemu-devel] [PATCH 0/9] pci: pcie host and mmcfg support, Isaku Yamahata, 2009/07/15
- [Qemu-devel] [PATCH 4/9] pci: use uint64_t for bar addr and size instead of uint32_t.,
Isaku Yamahata <=
- [Qemu-devel] [PATCH 1/9] pci: fix PCI_DPRINTF() wrt variadic macro., Isaku Yamahata, 2009/07/15
- [Qemu-devel] [PATCH 3/9] pci: define a constant to represent a unmapped bar and use it., Isaku Yamahata, 2009/07/15
- [Qemu-devel] [PATCH 6/9] pci.c: factor out while(bus) bus->next loop logic into pci_find_bus_from()., Isaku Yamahata, 2009/07/15
- [Qemu-devel] [PATCH 2/9] pci.c: use appropriate PRIs in PCI_DPRINTF()., Isaku Yamahata, 2009/07/15
- [Qemu-devel] [PATCH 9/9] [RFC] pci: pcie host and mmcfg support., Isaku Yamahata, 2009/07/15
- [Qemu-devel] [PATCH 8/9] pci_host.h: split non-inline static function in pci_host.h into pci_host_c.h, Isaku Yamahata, 2009/07/15
- [Qemu-devel] [PATCH 5/9] pci: 64bit bar support., Isaku Yamahata, 2009/07/15
- [Qemu-devel] [PATCH 7/9] pci: factor out the logic to get pci device from address., Isaku Yamahata, 2009/07/15