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[Qemu-devel] [PATCH v2 17/21] cpuid: Fix CPU models to use new feature s
From: |
Andre Przywara |
Subject: |
[Qemu-devel] [PATCH v2 17/21] cpuid: Fix CPU models to use new feature set names |
Date: |
Fri, 18 Sep 2009 13:48:10 +0200 |
Since we now do proper CPUID masking (either TCG or KVM kernel based)
we can now expose the full feature set of each actual CPU model.
Unsupported features will be removed at runtime.
Update various CPU models to use the new feature flag names and
adjust them to match the real thing.
Signed-off-by: Andre Przywara <address@hidden>
---
target-i386/cpuid.c | 94 ++++++++++++++++++--------------------------------
1 files changed, 34 insertions(+), 60 deletions(-)
diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
index 1ad21d3..e4200ea 100644
--- a/target-i386/cpuid.c
+++ b/target-i386/cpuid.c
@@ -173,22 +173,18 @@ static x86_def_t x86_defs[] = {
.family = 16,
.model = 2,
.stepping = 3,
- /* Missing: CPUID_VME, CPUID_HT */
- .features = PPRO_FEATURES |
- CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
- CPUID_PSE36,
- /* Missing: CPUID_EXT_CX16, CPUID_EXT_POPCNT */
- .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
- /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
- .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
- CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
- CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
- CPUID_EXT2_FFXSR,
- /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
- CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
- CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
- CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
- .ext3_features = CPUID_EXT3_SVM,
+ .features = K8_FEATURES | CPUID_HT,
+ .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR |
+ CPUID_EXT_CX16 | CPUID_EXT_POPCNT,
+ .ext2_features = (K8_FEATURES & EXT2_FEATURE_MASK) |
+ EXT2_FEATURES_64 | CPUID_EXT2_MMXEXT | CPUID_EXT2_FFXSR |
+ CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP |
+ CPUID_EXT2_3DNOWEXT | CPUID_EXT2_3DNOW,
+ .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_CMP_LEG |
+ CPUID_EXT3_SVM | CPUID_EXT3_EXTAPIC | CPUID_EXT3_CR8LEG |
+ CPUID_EXT3_ABM | CPUID_EXT3_SSE4A | CPUID_EXT3_MISALIGNSSE |
+ CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_OSVW | CPUID_EXT3_IBS |
+ CPUID_EXT3_SKINIT,
.xlevel = 0x8000001A,
.model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
},
@@ -198,18 +194,13 @@ static x86_def_t x86_defs[] = {
.family = 6,
.model = 15,
.stepping = 11,
- /* The original CPU also implements these features:
- CPUID_VME, CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
- CPUID_TM, CPUID_PBE */
- .features = PPRO_FEATURES |
- CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
- CPUID_PSE36,
- /* The original CPU also implements these ext features:
- CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
- CPUID_EXT_TM2, CPUID_EXT_CX16, CPUID_EXT_XTPR, CPUID_EXT_PDCM */
- .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3,
- .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
- /* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */
+ .features = FULL_FEATURES,
+ .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_DTES64 | CPUID_EXT_MONITOR |
+ CPUID_EXT_DSCPL | CPUID_EXT_VMX | CPUID_EXT_EST |
+ CPUID_EXT_TM2 | CPUID_EXT_SSSE3 |
+ CPUID_EXT_CX16 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
+ .ext2_features = EXT2_FEATURES_64,
+ .ext3_features = CPUID_EXT3_LAHF_LM,
.xlevel = 0x80000008,
.model_id = "Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz",
},
@@ -222,19 +213,9 @@ static x86_def_t x86_defs[] = {
.family = 15,
.model = 6,
.stepping = 1,
- /* Missing: CPUID_VME, CPUID_HT */
- .features = PPRO_FEATURES |
- CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
- CPUID_PSE36,
- /* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
+ .features = K8_FEATURES,
.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16,
- /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
- .ext2_features = (PPRO_FEATURES & 0x0183F3FF) |
- CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
- /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
- CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
- CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
- CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
+ .ext2_features = (K8_FEATURES & EXT2_FEATURE_MASK) | EXT2_FEATURES_64,
.ext3_features = 0,
.xlevel = 0x80000008,
.model_id = "Common KVM processor"
@@ -319,33 +300,26 @@ static x86_def_t x86_defs[] = {
.family = 6,
.model = 2,
.stepping = 3,
- .features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME |
- CPUID_MTRR | CPUID_MCA,
- .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
- CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
+ .features = PENTIUM2_FEATURES,
+ .ext2_features = (PENTIUM2_FEATURES & EXT2_FEATURE_MASK) |
+ CPUID_EXT2_SYSCALL | CPUID_EXT2_MMXEXT |
+ CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
.xlevel = 0x80000008,
- /* XXX: put another string ? */
- .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
+ .model_id = "AMD Athlon(tm) Processor",
},
{
.name = "n270",
- /* original is on level 10 */
- .level = 5,
+ .level = 10,
.family = 6,
.model = 28,
.stepping = 2,
- .features = PPRO_FEATURES |
- CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME,
- /* Missing: CPUID_DTS | CPUID_ACPI | CPUID_SS |
- * CPUID_HT | CPUID_TM | CPUID_PBE */
- /* Some CPUs got no CPUID_SEP */
- .ext_features = CPUID_EXT_MONITOR |
- CPUID_EXT_SSE3 /* PNI */ | CPUID_EXT_SSSE3,
- /* Missing: CPUID_EXT_DSCPL | CPUID_EXT_EST |
- * CPUID_EXT_TM2 | CPUID_EXT_XTPR */
- .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX,
- /* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */
- .xlevel = 0x8000000A,
+ .features = FULL_FEATURES & ~CPUID_PSE36,
+ .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_DTES64 | CPUID_EXT_MONITOR |
+ CPUID_EXT_DSCPL | CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_SSSE3 |
+ CPUID_EXT_XTPR | CPUID_EXT_PDCM | CPUID_EXT_MOVBE,
+ .ext2_features = CPUID_EXT2_NX,
+ .ext3_features = CPUID_EXT3_LAHF_LM,
+ .xlevel = 0x80000008,
.model_id = "Intel(R) Atom(TM) CPU N270 @ 1.60GHz",
},
};
--
1.6.1.3
- [Qemu-devel] [PATCH v2 09/21] cpuid: remove unnecessary kvm_trim function, (continued)
- [Qemu-devel] [PATCH v2 09/21] cpuid: remove unnecessary kvm_trim function, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 13/21] cpuid: add TCG feature bit trimming, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 08/21] cpuid: list all known x86 CPUID feature flags, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 15/21] cpuid: Adjust feature bit constants, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 16/21] cpuid: Update qemu64/32 CPU models, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 14/21] cpuid: decrease L2 cache for Intel and add comments, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 01/21] cpuid: move CPUID functions into separate file, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 20/21] cpuid: Add kvm32 CPU model, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 12/21] cpuid: Fix multicore setup on Intel, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 05/21] cpuid: moved host_cpuid function and remove prototype, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 17/21] cpuid: Fix CPU models to use new feature set names,
Andre Przywara <=
- [Qemu-devel] [PATCH v2 03/21] cpuid: replace magic number with named constant, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 19/21] cpuid: Add athlon64 CPU model, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 21/21] cpuid: Always expose 32 and 64-bit CPUs, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 18/21] cpuid: Fix 486 CPU model, Andre Przywara, 2009/09/18
- [Qemu-devel] [PATCH v2 11/21] cpuid: propagate further CPUID leafs when -cpu host, Andre Przywara, 2009/09/18