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Re: [Qemu-devel] [PATCH 61/61] pc_q35: apic mode for pci interrupt routi
From: |
Avi Kivity |
Subject: |
Re: [Qemu-devel] [PATCH 61/61] pc_q35: apic mode for pci interrupt routing. |
Date: |
Thu, 01 Oct 2009 10:50:31 +0200 |
User-agent: |
Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.1) Gecko/20090814 Fedora/3.0-2.6.b3.fc11 Lightning/1.0pre Thunderbird/3.0b3 |
On 09/30/2009 12:18 PM, Isaku Yamahata wrote:
apic mode for pci interrupt routing.
+static void ich9_lpc_ioapic_update_fn(void *opaque, int reset)
+{
+ struct ICH9_LPCIrqState *irq_state = opaque;
+ struct ICH9_LPCState *ich9_lpc = irq_state->lpc;
+
+ /* this can be called via gmch_init() where ich9_lpc isn't
+ allocated yet */
+ if (ich9_lpc == NULL)
+ return;
+
+ if (reset)
+ ich9_lpc->apic_mode = 0;
+ else
+ ich9_lpc->apic_mode = 1;
+}
+
My understanding was that the OS calls ACPI to set APIC mode. The ACPI
routine (_PIC) can then access a register to re-program the interrupt
router.
Does this reflect how Q35 works, or is this a shortcut?
On my desktop, I have:
Name (\GPIC, Zero)
Method (\_PIC, 1, NotSerialized)
{
Store (Arg0, \GPIC)
}
With GPIC later referenced by the various interrupt management routines
like _PRT; if GPIC is set they return interrupts in the range 16-19,
otherwise LNKA-LNKD.
--
Do not meddle in the internals of kernels, for they are subtle and quick to
panic.
- Re: [Qemu-devel] [PATCH 61/61] pc_q35: apic mode for pci interrupt routing.,
Avi Kivity <=