@@ -193,6 +194,79 @@ static void ioapic_mem_writel(void *opaque,
target_phys_addr_t addr, uint32_t va
}
}
+static int kvm_kernel_ioapic_load_from_user(IOAPICState *s)
+{
+ int r = 0;
+#if defined(KVM_CAP_IRQCHIP) && defined(TARGET_I386)
+ struct kvm_irqchip chip;
+ struct kvm_ioapic_state *kioapic;
+ int i;
+
+ if (!(kvm_enabled() && kvm_irqchip_in_kernel()))
+ return 0;
+
+ chip.chip_id = KVM_IRQCHIP_IOAPIC;
+ kioapic = &chip.chip.ioapic;
+
+ kioapic->id = s->id;
+ kioapic->ioregsel = s->ioregsel;
+ kioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
+ kioapic->irr = s->irr;
+ for (i = 0; i < IOAPIC_NUM_PINS; i++) {
+ kioapic->redirtbl[i].bits = s->ioredtbl[i];
+ }
+
+ r = kvm_set_irqchip(&chip);
+#endif
+ return r;
+}
+
+static void kvm_kernel_ioapic_save_to_user(IOAPICState *s)
+{
+#if defined(KVM_CAP_IRQCHIP) && defined(TARGET_I386)
+ struct kvm_irqchip chip;
+ struct kvm_ioapic_state *kioapic;
+ int i;
+
+ if (!(kvm_enabled() && kvm_irqchip_in_kernel()))
+ return;
+ chip.chip_id = KVM_IRQCHIP_IOAPIC;
+ kvm_get_irqchip(&chip);
+ kioapic = &chip.chip.ioapic;
+
+ s->id = kioapic->id;
+ s->ioregsel = kioapic->ioregsel;
+ s->irr = kioapic->irr;
+ for (i = 0; i < IOAPIC_NUM_PINS; i++) {
+ s->ioredtbl[i] = kioapic->redirtbl[i].bits;
+ }
+#endif
+}
+
+static void ioapic_pre_save(void *opaque)
+{
+ IOAPICState *s = (void *)opaque;
+
+ kvm_kernel_ioapic_save_to_user(s);
+}
+
+static int ioapic_pre_load(void *opaque)
+{
+ IOAPICState *s = opaque;
+
+ /* in case we are doing version 1, we just set these to sane values */
+ s->irr = 0;
+ return 0;
+}
+
+static int ioapic_post_load(void *opaque, int version_id)
+{
+ IOAPICState *s = opaque;
+
+ return kvm_kernel_ioapic_load_from_user(s);
+}
+
+
static const VMStateDescription vmstate_ioapic = {
.name = "ioapic",
.version_id = 2,
@@ -205,7 +279,10 @@ static const VMStateDescription vmstate_ioapic = {
VMSTATE_UINT32_V(irr, IOAPICState, 2),
VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICState, IOAPIC_NUM_PINS),
VMSTATE_END_OF_LIST()
- }
+ },
+ .pre_load = ioapic_pre_load,
+ .post_load = ioapic_post_load,
+ .pre_save = ioapic_pre_save,
};
static CPUReadMemoryFunc * const ioapic_mem_read[3] = {
diff --git a/kvm-all.c b/kvm-all.c
index 48ae26c..d795285 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -411,6 +411,26 @@ int kvm_check_extension(KVMState *s, unsigned int
extension)
return ret;
}
+#ifdef KVM_CAP_IRQCHIP
+int kvm_set_irqchip(struct kvm_irqchip *chip)
+{
+ if (!kvm_state->irqchip_in_kernel) {
+ return 0;
+ }
+
+ return kvm_vm_ioctl(kvm_state, KVM_SET_IRQCHIP, chip);
+}