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[Qemu-devel] [PATCH 08/12] target-arm: optimize thumb2 load/store multip


From: Juha.Riihimaki
Subject: [Qemu-devel] [PATCH 08/12] target-arm: optimize thumb2 load/store multiple ops
Date: Wed, 21 Oct 2009 12:18:00 +0200

Thumb2 load/store multiple instructions can be slightly optimized by  
loading the register offset constant into a variable outside the  
register loop and using the preloaded variable inside the loop instead  
of reloading the offset value to a temporary variable on each loop  
iteration. This causes less TCG ops to be generated for a Thumb2 load/ 
store multiple instruction.

Signed-off-by: Juha Riihimäki <address@hidden>
---
diff --git a/target-arm/translate.c b/target-arm/translate.c
index c92ecc6..abb3105 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7370,6 +7370,7 @@ static int disas_thumb2_insn(CPUState *env,  
DisasContext *s, uint16_t insn_hw1)
                      tcg_gen_addi_i32(addr, addr, -offset);
                  }

+                tmp2 = tcg_const_i32(4);
                  for (i = 0; i < 16; i++) {
                      if ((insn & (1 << i)) == 0)
                          continue;
@@ -7386,8 +7387,9 @@ static int disas_thumb2_insn(CPUState *env,  
DisasContext *s, uint16_t insn_hw1)
                          tmp = load_reg(s, i);
                          gen_st32(tmp, addr, IS_USER(s));
                      }
-                    tcg_gen_addi_i32(addr, addr, 4);
+                    tcg_gen_add_i32(addr, addr, tmp2);
                  }
+                tcg_temp_free_i32(tmp2);
                  if (insn & (1 << 21)) {
                      /* Base register writeback.  */
                      if (insn & (1 << 24)) {

Attachment: translate.c.t2ldmstm.diff
Description: translate.c.t2ldmstm.diff


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