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Re: [Qemu-devel] [PATCH v2 03/10] target-arm: allow modifying vfp fpexc
From: |
Laurent Desnogues |
Subject: |
Re: [Qemu-devel] [PATCH v2 03/10] target-arm: allow modifying vfp fpexc en bit only |
Date: |
Sun, 25 Oct 2009 13:23:44 +0100 |
On Sat, Oct 24, 2009 at 1:19 PM, <address@hidden> wrote:
> From: Juha Riihimäki <address@hidden>
>
> All other bits except for the EN in the VFP FPEXC register are defined
> as subarchitecture specific and real functionality for any of the
> other bits has not been implemented in QEMU. However, current code
> allows modifying all bits in the VFP FPEXC register leading to
> problems when guest code is writing 1's to the subarchitecture
> specific bits and checking whether the bits stay up to verify the
> existence of functionality which in fact does not exist in QEMU.
Shouldn't writes to FPEXC from gdb be protected in the same
way? Except for that I agree with your patch.
Laurent
> Signed-off-by: Juha Riihimäki <address@hidden>
> ---
> target-arm/translate.c | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index 09c996d..8cb1c0f 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -2788,6 +2788,9 @@ static int disas_vfp_insn(CPUState * env, DisasContext
> *s, uint32_t insn)
> case ARM_VFP_FPEXC:
> if (IS_USER(s))
> return 1;
> + /* TODO: VFP subarchitecture support.
> + * For now, keep the EN bit only */
> + tcg_gen_andi_i32(tmp, tmp, 1 << 30);
> store_cpu_field(tmp, vfp.xregs[rn]);
> gen_lookup_tb(s);
> break;
> --
> 1.6.5
>
>
>
>
[Qemu-devel] [PATCH v2 07/10] target-arm: optimize thumb2 load/store multiple ops, juha . riihimaki, 2009/10/24