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[Qemu-devel] Re: [PATCH 4/4] pci: interrupt disable bit support
From: |
Isaku Yamahata |
Subject: |
[Qemu-devel] Re: [PATCH 4/4] pci: interrupt disable bit support |
Date: |
Thu, 26 Nov 2009 12:04:51 +0900 |
User-agent: |
Mutt/1.5.6i |
On Wed, Nov 25, 2009 at 06:59:06PM +0200, Michael S. Tsirkin wrote:
> interrupt disable bit is mandatory in PCI spec,
> so we must implement it to be spec compliant.
>
> Signed-off-by: Michael S. Tsirkin <address@hidden>
> ---
> hw/pci.c | 57 ++++++++++++++++++++++++++++++++++++++++-----------------
> hw/pci.h | 4 ++++
> 2 files changed, 44 insertions(+), 17 deletions(-)
>
> diff --git a/hw/pci.c b/hw/pci.c
> index 844664b..3daae46 100644
> --- a/hw/pci.c
> +++ b/hw/pci.c
> @@ -114,12 +114,43 @@ static void pci_update_irq_status(PCIDevice *dev)
> }
> }
>
> +static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change)
> +{
> + PCIBus *bus;
> + for (;;) {
> + bus = pci_dev->bus;
> + irq_num = bus->map_irq(pci_dev, irq_num);
> + if (bus->set_irq)
> + break;
> + pci_dev = bus->parent_dev;
> + }
> + bus->irq_count[irq_num] += change;
> + bus->set_irq(bus->irq_opaque, irq_num, bus->irq_count[irq_num] != 0);
Let's use ! instead of != 0 for consistency.
> +}
> +
> +/* Update irq disabled field after config space change,
> + * assert/deassert interrupts if necessary. */
> +static void pci_update_irq_disabled(PCIDevice *d)
> +{
> + int i;
> + int disabled = !!(pci_get_word(d->config + PCI_COMMAND) &
> + PCI_COMMAND_INTX_DISABLE);
> + if (disabled == d->irq_disabled)
> + return;
> + d->irq_disabled = disabled;
> + for (i = 0; i < ARRAY_SIZE(d->irq_state); ++i) {
> + int state = d->irq_state[i];
> + pci_change_irq_level(d, i, disabled ? -state : state);
> + }
> +}
> +
"if (!changed) return" check is in pci_set_irq().
So if d->irq_state[i] == 0, bus->set_irq() will be called again.
I suppose this isn't your intention.
I suppose !changed check should be in pci_change_irq_level() instead of
pci_set_irq().
> static void pci_device_reset(PCIDevice *dev)
> {
> int r;
>
> memset(dev->irq_state, 0, sizeof dev->irq_state);
> dev->irq_status = 0;
> + dev->irq_disabled = 0;
> pci_update_irq_status(dev);
> dev->config[PCI_COMMAND] &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
> PCI_COMMAND_MASTER);
> @@ -345,6 +376,7 @@ int pci_device_load(PCIDevice *s, QEMUFile *f)
> }
> /* Restore the interrupt status bit. */
> pci_update_irq_status(s);
> + pci_update_irq_disabled(s);
> return ret;
> }
>
> @@ -458,7 +490,8 @@ static void pci_init_wmask(PCIDevice *dev)
> dev->wmask[PCI_CACHE_LINE_SIZE] = 0xff;
> dev->wmask[PCI_INTERRUPT_LINE] = 0xff;
> pci_set_word(dev->wmask + PCI_COMMAND,
> - PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
> + PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
> + PCI_COMMAND_INTX_DISABLE);
>
> memset(dev->wmask + PCI_CONFIG_HEADER_SIZE, 0xff,
> config_size - PCI_CONFIG_HEADER_SIZE);
> @@ -903,26 +936,14 @@ void pci_default_write_config(PCIDevice *d, uint32_t
> addr, uint32_t val, int l)
> ranges_overlap(addr, l, PCI_ROM_ADDRESS1, 4) ||
> range_covers_byte(addr, l, PCI_COMMAND))
> pci_update_mappings(d);
> +
> + if (range_covers_byte(addr, l, PCI_COMMAND))
> + pci_update_irq_disabled(d);
> }
>
> /***********************************************************/
> /* generic PCI irq support */
>
> -static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change)
> -{
> - PCIBus *bus;
> - for (;;) {
> - bus = pci_dev->bus;
> - irq_num = bus->map_irq(pci_dev, irq_num);
> - if (bus->set_irq)
> - break;
> - pci_dev = bus->parent_dev;
> - }
> - bus->irq_count[irq_num] += change;
> - bus->set_irq(bus->irq_opaque, irq_num, bus->irq_count[irq_num] != 0);
> -}
> -
> -
> /* 0 <= irq_num <= 3. level must be 0 or 1 */
> static void pci_set_irq(void *opaque, int irq_num, int level)
> {
> @@ -935,7 +956,9 @@ static void pci_set_irq(void *opaque, int irq_num, int
> level)
>
> pci_dev->irq_state[irq_num] = level;
> pci_dev->irq_status += change;
> - pci_update_irq_status(s);
> + pci_update_irq_status(pci_dev);
> + if (pci_dev->irq_disabled)
> + return;
> pci_change_irq_level(pci_dev, irq_num, change);
> }
>
> diff --git a/hw/pci.h b/hw/pci.h
> index c3f2c3f..994b8bc 100644
> --- a/hw/pci.h
> +++ b/hw/pci.h
> @@ -101,6 +101,7 @@ typedef struct PCIIORegion {
> #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space
> */
> #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
> #define PCI_COMMAND_MASTER 0x4 /* Enable bus master */
> +#define PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */
> #define PCI_STATUS 0x06 /* 16 bits */
> #define PCI_STATUS_INTERRUPT 0x08
> #define PCI_REVISION_ID 0x08 /* 8 bits */
> @@ -226,6 +227,9 @@ struct PCIDevice {
> /* Sum of all irq levels. Used to implement irq status register. */
> int irq_status;
>
> + /* Whether interrupts are disabled by command bit. */
> + int irq_disabled;
> +
> /* Capability bits */
> uint32_t cap_present;
>
--
yamahata