Re: [Qemu-devel] [PATCH 2/9] sparc64: add PSR and PIL to cpu state dump

[Blue Swirl]

On Tue, Jan 5, 2010 at 11:19 PM, Igor V. Kovalenko
<address@hidden> wrote:
> From: Igor V. Kovalenko <address@hidden>
>
> Signed-off-by: Igor V. Kovalenko <address@hidden>
> ---
>  target-sparc/helper.c |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/target-sparc/helper.c b/target-sparc/helper.c
> index a06923a..0f0e583 100644
> --- a/target-sparc/helper.c
> +++ b/target-sparc/helper.c
> @@ -1452,6 +1452,7 @@ void cpu_dump_state(CPUState *env, FILE *f,
>  #ifdef TARGET_SPARC64
>     cpu_fprintf(f, "pstate: 0x%08x ccr: 0x%02x asi: 0x%02x tl: %d fprs: %d\n",
>                 env->pstate, GET_CCR(env), env->asi, env->tl, env->fprs);
> +    cpu_fprintf(f, "psr: 0x%08x pil=%x\n", GET_PSR(env), env->psrpil);

PSR does not exist on Sparc64, instead we have separate registers,
like VER, CWP and CCR. PIL part is OK.