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[Qemu-devel] Re: [PATCH] Add definitions for current cpu models..
From: |
Arnd Bergmann |
Subject: |
[Qemu-devel] Re: [PATCH] Add definitions for current cpu models.. |
Date: |
Thu, 21 Jan 2010 00:20:31 +0100 |
User-agent: |
KMail/1.12.2 (Linux/2.6.31-14-generic; KDE/4.3.2; x86_64; ; ) |
On Monday 18 January 2010, john cooper wrote:
> + .name = "Conroe",
> + .level = 2,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 6, /* P6 */
> + .model = 2,
^^^^^^^^ that looks wrong -- what is model 2 actually?
> + .stepping = 3,
> + .features = PPRO_FEATURES |
> + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | /* note 1 */
> + CPUID_PSE36, /* note 2 */
> + .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_SSSE3,
> + .ext2_features = (PPRO_FEATURES & CPUID_EXT2_MASK) |
> + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> + .ext3_features = CPUID_EXT3_LAHF_LM,
> + .xlevel = 0x8000000A,
> + .model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)",
> + },
Celeron_4x0 is a rather bad example, because it is based on the
single-core Conroe-L, which is family 6 / model 22 unlike all the dual-
and quad-core Merom/Conroe that are model 15.
> + {
> + .name = "Penryn",
> + .level = 2,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 6, /* P6 */
> + .model = 2,
> + .stepping = 3,
> + .features = PPRO_FEATURES |
> + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | /* note 1 */
> + CPUID_PSE36, /* note 2 */
> + .ext_features = CPUID_EXT_SSE3 |
> + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE41,
> + .ext2_features = (PPRO_FEATURES & CPUID_EXT2_MASK) |
> + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> + .ext3_features = CPUID_EXT3_LAHF_LM,
> + .xlevel = 0x8000000A,
> + .model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)",
> + },
This would be model 23 for Penryn-class Xeon/Core/Pentium/Celeron processors
without L3 cache.
> + {
> + .name = "Nehalem",
> + .level = 2,
> + .vendor1 = CPUID_VENDOR_INTEL_1,
> + .vendor2 = CPUID_VENDOR_INTEL_2,
> + .vendor3 = CPUID_VENDOR_INTEL_3,
> + .family = 6, /* P6 */
> + .model = 2,
> + .stepping = 3,
> + .features = PPRO_FEATURES |
> + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | /* note 1 */
> + CPUID_PSE36, /* note 2 */
> + .ext_features = CPUID_EXT_SSE3 |
> + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE41 |
> + CPUID_EXT_SSE42 | CPUID_EXT_POPCNT,
> + .ext2_features = (PPRO_FEATURES & CPUID_EXT2_MASK) |
> + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> + .ext3_features = CPUID_EXT3_LAHF_LM,
> + .xlevel = 0x8000000A,
> + .model_id = "Intel Core i7 9xx (Nehalem Class Core i7)",
> + },
Apparently, not all the i7-9xx CPUs are Nehalem, the i7-980X is supposed
to be Westmere, which has more features.
Because of the complexity, I'd recommend passing down the *model* number
of the emulated CPU, the interesting Intel ones (those supported by KVM) being:
15-6: CedarMill/Presler/Dempsey/Tulsa (Pentium 4/Pentium D/Xeon 50xx/Xeon 71xx)
6-14: Yonah/Sossaman (Celeron M4xx, Core Solo/Duo, Pentium Dual-Core T1000,
Xeon ULV)
6-15: Merom/Conroe/Kentsfield/Woodcrest/Clovertown/Tigerton
(Celeron M5xx/E1xxx/T1xxx, Pentium T2xxx/T3xxx/E2xxx,Core 2 Solo U2xxx,
Core 2 Duo E4xxx/E6xxx/Q6xxx/T5xxx/T7xxx/L7xxx/U7xxx/SP7xxx,
Xeon 30xx/32xx/51xx/52xx/72xx/73xx)
6-22: Penryn/Wolfdale/Yorkfield/Harpertown (Celeron 7xx/9xx/SU2xxx/T3xxx/E3xxx,
Pentium T4xxx/SU2xxx/SU4xxx/E5xxx/E6xxx, Core 2 Solo SU3xxx,
Core 2 Duo Pxxxx/SUxxxx/T6xxx/x8xxx/x9xxx,
Xeon 31xx/33xx/52xx/54xx)
6-26: Gainestown/Bloomfield (Xeon 35xx/55xx, Core i7-9xx)
6-28: Atom
6-29: Dunnington (Xeon 74xx)
6-30: Lynnfield/Clarksfield/JasperForest (Xeon 34xx, Core i7-8xx, Core i7-xxxQM,
Core i5-7xx)
6-37: Arrandale/Clarkdale (Dual-Core Core i3/i5/i7)
6-44: Gulftown (six-core)
Arnd
- Re: [Qemu-devel] [PATCH] Add definitions for current cpu models.., (continued)
Re: [Qemu-devel] [PATCH] Add definitions for current cpu models.., Jamie Lokier, 2010/01/19
[Qemu-devel] Re: [PATCH] Add definitions for current cpu models..,
Arnd Bergmann <=