|
From: | Paolo Bonzini |
Subject: | [Qemu-devel] Re: Regression: segfault on ARM host |
Date: | Mon, 01 Mar 2010 23:33:23 +0100 |
User-agent: | Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.7) Gecko/20100120 Fedora/3.0.1-1.fc12 Lightning/1.0b2pre Thunderbird/3.0.1 |
On 03/01/2010 10:33 PM, Aurelien Jarno wrote:
While trying to implement setcond on TCG ARM, I have discovered it does not work anymore. I have bisected this regression to: commit 6113d6d3169393c323ac4c82d756a850145a5e7a Author: Paolo Bonzini<address@hidden> Date: Fri Jan 15 09:42:09 2010 +0100 change while to if The while loop will be executed exactly 0 or 1 times, depending on env->exit_request. Signed-off-by: Paolo Bonzini<address@hidden> Signed-off-by: Anthony Liguori<address@hidden> The assertion is actually triggered. When the next patch removing the assertion is also applied it segfaults instead.
Looks like a race. The only piece of logic that is changed by that commit is reverted in the attached patch, can you try it? If it passes, I can resubmit with S-o-b.
If it doesn't pass, I wonder whether the while loop was there to trick the compiler into not optimizing something. Seems a bit too clever though.
Paolo
qemu-race.patch
Description: Text document
[Prev in Thread] | Current Thread | [Next in Thread] |