Re: [Qemu-devel] [PATCH 05/10] Compile openpic only once

qemu-devel
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 05/10] Compile openpic only once

From:	Aurelien Jarno
Subject:	Re: [Qemu-devel] [PATCH 05/10] Compile openpic only once
Date:	Wed, 31 Mar 2010 00:22:59 +0200
User-agent:	Mutt/1.5.18 (2008-05-17)
On Fri, Mar 26, 2010 at 09:03:20PM +0200, Blue Swirl wrote:
> Replace TARGET_PAGE_SIZE with 4096. Make byte swapping unconditional
> since PPC is big endian.

I am not sure it is a good idea. Even if we currently emulates only big
endian PPC machine, the PPC architecture can be both little and big 
endian, and openpic is the kind of device that is present on a lot of
PPC boards.

Also replacing TARGET_PAGE_SIZE to 4096 most probably breaks 
qemu-system-ppcemb (used for example for bamboo or mpc8544ds boards),
which defines TARGET_PAGE_SIZE to 1024.

> Signed-off-by: Blue Swirl <address@hidden>
> ---
>  Makefile.objs                      |    1 +
>  Makefile.target                    |    2 +-
>  default-configs/ppc-softmmu.mak    |    1 +
>  default-configs/ppc64-softmmu.mak  |    1 +
>  default-configs/ppcemb-softmmu.mak |    1 +
>  hw/openpic.c                       |   32 ++++++++------------------------
>  6 files changed, 13 insertions(+), 25 deletions(-)
> 
> diff --git a/Makefile.objs b/Makefile.objs
> index 713821e..b7db0a6 100644
> --- a/Makefile.objs
> +++ b/Makefile.objs
> @@ -148,6 +148,7 @@ hw-obj-$(CONFIG_USB_UHCI) += usb-uhci.o
>  hw-obj-$(CONFIG_USB_OHCI) += usb-ohci.o
>  hw-obj-$(CONFIG_FDC) += fdc.o
>  hw-obj-$(CONFIG_ACPI) += acpi.o
> +hw-obj-$(CONFIG_OPENPIC) += openpic.o
> 
>  # PCI watchdog devices
>  hw-obj-y += wdt_i6300esb.o
> diff --git a/Makefile.target b/Makefile.target
> index e3a9eed..5aabafc 100644
> --- a/Makefile.target
> +++ b/Makefile.target
> @@ -191,7 +191,7 @@ obj-i386-y += debugcon.o multiboot.o
> 
>  # shared objects
>  obj-ppc-y = ppc.o
> -obj-ppc-y += vga.o dma.o openpic.o
> +obj-ppc-y += vga.o dma.o
>  # PREP target
>  obj-ppc-y += pckbd.o i8259.o mc146818rtc.o
>  obj-ppc-y += prep_pci.o ppc_prep.o
> diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak
> index 78b01d9..671b853 100644
> --- a/default-configs/ppc-softmmu.mak
> +++ b/default-configs/ppc-softmmu.mak
> @@ -9,6 +9,7 @@ CONFIG_VGA_PCI=y
>  CONFIG_SERIAL=y
>  CONFIG_I8254=y
>  CONFIG_FDC=y
> +CONFIG_OPENPIC=y
>  CONFIG_IDE_CORE=y
>  CONFIG_IDE_QDEV=y
>  CONFIG_IDE_PCI=y
> diff --git a/default-configs/ppc64-softmmu.mak
> b/default-configs/ppc64-softmmu.mak
> index 08b07ec..7841204 100644
> --- a/default-configs/ppc64-softmmu.mak
> +++ b/default-configs/ppc64-softmmu.mak
> @@ -9,6 +9,7 @@ CONFIG_VGA_PCI=y
>  CONFIG_SERIAL=y
>  CONFIG_I8254=y
>  CONFIG_FDC=y
> +CONFIG_OPENPIC=y
>  CONFIG_IDE_CORE=y
>  CONFIG_IDE_QDEV=y
>  CONFIG_IDE_PCI=y
> diff --git a/default-configs/ppcemb-softmmu.mak
> b/default-configs/ppcemb-softmmu.mak
> index a099468..5bc4d3f 100644
> --- a/default-configs/ppcemb-softmmu.mak
> +++ b/default-configs/ppcemb-softmmu.mak
> @@ -9,6 +9,7 @@ CONFIG_VGA_PCI=y
>  CONFIG_SERIAL=y
>  CONFIG_I8254=y
>  CONFIG_FDC=y
> +CONFIG_OPENPIC=y
>  CONFIG_IDE_CORE=y
>  CONFIG_IDE_QDEV=y
>  CONFIG_IDE_PCI=y
> diff --git a/hw/openpic.c b/hw/openpic.c
> index aa244ee..aee5eb6 100644
> --- a/hw/openpic.c
> +++ b/hw/openpic.c
> @@ -597,9 +597,7 @@ static void openpic_gbl_write (void *opaque,
> target_phys_addr_t addr, uint32_t v
>      DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
>      if (addr & 0xF)
>          return;
> -#if defined TARGET_WORDS_BIGENDIAN
>      val = openpic_swap32(opp, val);
> -#endif
>      addr &= 0xFF;
>      switch (addr) {
>      case 0x00: /* FREP */
> @@ -693,9 +691,7 @@ static uint32_t openpic_gbl_read (void *opaque,
> target_phys_addr_t addr)
>          break;
>      }
>      DPRINTF("%s: => %08x\n", __func__, retval);
> -#if defined TARGET_WORDS_BIGENDIAN
>      retval = openpic_swap32(opp, retval);
> -#endif
> 
>      return retval;
>  }
> @@ -708,9 +704,7 @@ static void openpic_timer_write (void *opaque,
> uint32_t addr, uint32_t val)
>      DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
>      if (addr & 0xF)
>          return;
> -#if defined TARGET_WORDS_BIGENDIAN
>      val = openpic_swap32(opp, val);
> -#endif
>      addr -= 0x1100;
>      addr &= 0xFFFF;
>      idx = (addr & 0xFFF0) >> 6;
> @@ -763,9 +757,7 @@ static uint32_t openpic_timer_read (void *opaque,
> uint32_t addr)
>          break;
>      }
>      DPRINTF("%s: => %08x\n", __func__, retval);
> -#if defined TARGET_WORDS_BIGENDIAN
>      retval = openpic_swap32(opp, retval);
> -#endif
> 
>      return retval;
>  }
> @@ -778,9 +770,7 @@ static void openpic_src_write (void *opaque,
> uint32_t addr, uint32_t val)
>      DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
>      if (addr & 0xF)
>          return;
> -#if defined TARGET_WORDS_BIGENDIAN
>      val = openpic_swap32(opp, val);
> -#endif
>      addr = addr & 0xFFF0;
>      idx = addr >> 5;
>      if (addr & 0x10) {
> @@ -812,9 +802,7 @@ static uint32_t openpic_src_read (void *opaque,
> uint32_t addr)
>          retval = read_IRQreg(opp, idx, IRQ_IPVP);
>      }
>      DPRINTF("%s: => %08x\n", __func__, retval);
> -#if defined TARGET_WORDS_BIGENDIAN
>      retval = openpic_swap32(opp, retval);
> -#endif
> 
>      return retval;
>  }
> @@ -829,9 +817,7 @@ static void openpic_cpu_write (void *opaque,
> target_phys_addr_t addr, uint32_t v
>      DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
>      if (addr & 0xF)
>          return;
> -#if defined TARGET_WORDS_BIGENDIAN
>      val = openpic_swap32(opp, val);
> -#endif
>      addr &= 0x1FFF0;
>      idx = addr / 0x1000;
>      dst = &opp->dst[idx];
> @@ -949,9 +935,7 @@ static uint32_t openpic_cpu_read (void *opaque,
> target_phys_addr_t addr)
>          break;
>      }
>      DPRINTF("%s: => %08x\n", __func__, retval);
> -#if defined TARGET_WORDS_BIGENDIAN
>      retval = openpic_swap32(opp, retval);
> -#endif
> 
>      return retval;
>  }
> @@ -1384,7 +1368,7 @@ static void mpic_src_ext_write (void *opaque,
> target_phys_addr_t addr,
>      if (addr & 0xF)
>          return;
> 
> -    addr -= MPIC_EXT_REG_START & (TARGET_PAGE_SIZE - 1);
> +    addr -= MPIC_EXT_REG_START & (4096 - 1);
>      if (addr < MPIC_EXT_REG_SIZE) {
>          idx += (addr & 0xFFF0) >> 5;
>          if (addr & 0x10) {
> @@ -1408,7 +1392,7 @@ static uint32_t mpic_src_ext_read (void *opaque,
> target_phys_addr_t addr)
>      if (addr & 0xF)
>          return retval;
> 
> -    addr -= MPIC_EXT_REG_START & (TARGET_PAGE_SIZE - 1);
> +    addr -= MPIC_EXT_REG_START & (4096 - 1);
>      if (addr < MPIC_EXT_REG_SIZE) {
>          idx += (addr & 0xFFF0) >> 5;
>          if (addr & 0x10) {
> @@ -1434,7 +1418,7 @@ static void mpic_src_int_write (void *opaque,
> target_phys_addr_t addr,
>      if (addr & 0xF)
>          return;
> 
> -    addr -= MPIC_INT_REG_START & (TARGET_PAGE_SIZE - 1);
> +    addr -= MPIC_INT_REG_START & (4096 - 1);
>      if (addr < MPIC_INT_REG_SIZE) {
>          idx += (addr & 0xFFF0) >> 5;
>          if (addr & 0x10) {
> @@ -1458,7 +1442,7 @@ static uint32_t mpic_src_int_read (void *opaque,
> target_phys_addr_t addr)
>      if (addr & 0xF)
>          return retval;
> 
> -    addr -= MPIC_INT_REG_START & (TARGET_PAGE_SIZE - 1);
> +    addr -= MPIC_INT_REG_START & (4096 - 1);
>      if (addr < MPIC_INT_REG_SIZE) {
>          idx += (addr & 0xFFF0) >> 5;
>          if (addr & 0x10) {
> @@ -1484,7 +1468,7 @@ static void mpic_src_msg_write (void *opaque,
> target_phys_addr_t addr,
>      if (addr & 0xF)
>          return;
> 
> -    addr -= MPIC_MSG_REG_START & (TARGET_PAGE_SIZE - 1);
> +    addr -= MPIC_MSG_REG_START & (4096 - 1);
>      if (addr < MPIC_MSG_REG_SIZE) {
>          idx += (addr & 0xFFF0) >> 5;
>          if (addr & 0x10) {
> @@ -1508,7 +1492,7 @@ static uint32_t mpic_src_msg_read (void *opaque,
> target_phys_addr_t addr)
>      if (addr & 0xF)
>          return retval;
> 
> -    addr -= MPIC_MSG_REG_START & (TARGET_PAGE_SIZE - 1);
> +    addr -= MPIC_MSG_REG_START & (4096 - 1);
>      if (addr < MPIC_MSG_REG_SIZE) {
>          idx += (addr & 0xFFF0) >> 5;
>          if (addr & 0x10) {
> @@ -1534,7 +1518,7 @@ static void mpic_src_msi_write (void *opaque,
> target_phys_addr_t addr,
>      if (addr & 0xF)
>          return;
> 
> -    addr -= MPIC_MSI_REG_START & (TARGET_PAGE_SIZE - 1);
> +    addr -= MPIC_MSI_REG_START & (4096 - 1);
>      if (addr < MPIC_MSI_REG_SIZE) {
>          idx += (addr & 0xFFF0) >> 5;
>          if (addr & 0x10) {
> @@ -1557,7 +1541,7 @@ static uint32_t mpic_src_msi_read (void *opaque,
> target_phys_addr_t addr)
>      if (addr & 0xF)
>          return retval;
> 
> -    addr -= MPIC_MSI_REG_START & (TARGET_PAGE_SIZE - 1);
> +    addr -= MPIC_MSI_REG_START & (4096 - 1);
>      if (addr < MPIC_MSI_REG_SIZE) {
>          idx += (addr & 0xFFF0) >> 5;
>          if (addr & 0x10) {
> -- 
> 1.6.2.4
> 
> 
> 

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net
[Prev in Thread]
Current Thread
[Next in Thread]
[Qemu-devel] [PATCH 05/10] Compile openpic only once, Blue Swirl, 2010/03/26
- Re: [Qemu-devel] [PATCH 05/10] Compile openpic only once, Aurelien Jarno <=
Prev by Date: Re: [Qemu-devel] qemu git head 20100323 on FreeBSD - qemu-devel port update for testing
Next by Date: [Qemu-devel] [PATCH] mcf: add simr/cimr registers to interrupt controller for 5208
Previous by thread: [Qemu-devel] [PATCH 05/10] Compile openpic only once
Next by thread: [Qemu-devel] [PATCH 06/10] Compile prep_pci only once
Index(es):
- Date
- Thread