Re: [Qemu-devel] [PATCH] target-mips: Fix format specifiers for fpu_fprintf

[Aurelien Jarno]

On Thu, Apr 01, 2010 at 11:05:14PM +0200, Stefan Weil wrote:
> In the previous patch which introduced fprintf_function to
> allow parameter checking by gcc some compiler warnings
> remained unfixed.
> 
> These warnings are fixed here.

Thanks applied.

> Signed-off-by: Stefan Weil <address@hidden>
> ---
>  target-mips/translate.c |   34 ++++++++++++++++++++--------------
>  1 files changed, 20 insertions(+), 14 deletions(-)
> 
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 02367e4..61f8d72 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -9563,20 +9563,26 @@ static void fpu_dump_state(CPUState *env, FILE *f,
>      int i;
>      int is_fpu64 = !!(env->hflags & MIPS_HFLAG_F64);
>  
> -#define printfpr(fp)                                                        \
> -    do {                                                                    \
> -        if (is_fpu64)                                                       \
> -            fpu_fprintf(f, "w:%08x d:%016lx fd:%13g fs:%13g psu: %13g\n",   \
> -                        (fp)->w[FP_ENDIAN_IDX], (fp)->d, (fp)->fd,          \
> -                        (fp)->fs[FP_ENDIAN_IDX], (fp)->fs[!FP_ENDIAN_IDX]); \
> -        else {                                                              \
> -            fpr_t tmp;                                                      \
> -            tmp.w[FP_ENDIAN_IDX] = (fp)->w[FP_ENDIAN_IDX];                  \
> -            tmp.w[!FP_ENDIAN_IDX] = ((fp) + 1)->w[FP_ENDIAN_IDX];           \
> -            fpu_fprintf(f, "w:%08x d:%016lx fd:%13g fs:%13g psu:%13g\n",    \
> -                        tmp.w[FP_ENDIAN_IDX], tmp.d, tmp.fd,                \
> -                        tmp.fs[FP_ENDIAN_IDX], tmp.fs[!FP_ENDIAN_IDX]);     \
> -        }                                                                   \
> +#define printfpr(fp)                                                    \
> +    do {                                                                \
> +        if (is_fpu64)                                                   \
> +            fpu_fprintf(f, "w:%08x d:%016" PRIx64                       \
> +                        " fd:%13g fs:%13g psu: %13g\n",                 \
> +                        (fp)->w[FP_ENDIAN_IDX], (fp)->d,                \
> +                        (double)(fp)->fd,                               \
> +                        (double)(fp)->fs[FP_ENDIAN_IDX],                \
> +                        (double)(fp)->fs[!FP_ENDIAN_IDX]);              \
> +        else {                                                          \
> +            fpr_t tmp;                                                  \
> +            tmp.w[FP_ENDIAN_IDX] = (fp)->w[FP_ENDIAN_IDX];              \
> +            tmp.w[!FP_ENDIAN_IDX] = ((fp) + 1)->w[FP_ENDIAN_IDX];       \
> +            fpu_fprintf(f, "w:%08x d:%016" PRIx64                       \
> +                        " fd:%13g fs:%13g psu:%13g\n",                  \
> +                        tmp.w[FP_ENDIAN_IDX], tmp.d,                    \
> +                        (double)tmp.fd,                                 \
> +                        (double)tmp.fs[FP_ENDIAN_IDX],                  \
> +                        (double)tmp.fs[!FP_ENDIAN_IDX]);                \
> +        }                                                               \
>      } while(0)
>  
>  
> -- 
> 1.7.0
> 
> 
> 
> 

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net